Hello,
We observed an unepected behavior of the ESM nERROR pin upon Warm Reset.
Initial conditions are illustrated on top of attached figures.
Code executing on target is generating an NMPU - DMA Port A MPU Error EMS1.69 by generating an incorerct DMA request on purpose. ESM1.69 is triggered as expected, nERROR pin and low level interrupt handler activated accordingly to ESMIEPCR7 and ESMILSR7 registers configuration. We leave some time to the handler to log some engineering data and clear the ESMSR7 register.
From this state, as described in attached diagram:
(a) requesting a reset of the nError pin is immediately successfull as LTCR reached zero.
but after a warm reset (b)
(c) requesting a reset of the nError pin as no effect
(d) forcing the nerror is succesfull (while we would expect the request to be rejected as the nerror pin is already active, as per TRM §16.2.3-1 'The ESM module cannot be switched into the error forcing mode if a failure has already been detected in functional mode. The application command to switch to error forcing mode is ignored'
(e) From this accepted enforced mode, requesting a switch back to normal mode is actually clearing the nError pin, despite no actual reset request was sent; so original error context is lost.
(f) From the accepted enforced mode, requesting a reset of the nerror pin is accepted but state remains in reset request mode in ESMEKR while an automatic switch back to normal mode is expected as per TRM §16.2 "(Once the ERROR pin outputs low, a power on reset or a write of 0x5 to ESMEKR is required to release the ESM error pin back to normal state)", andnormal mode is only reached if actually requested by CPU by writing 0x0 in ESMEKR.
Can you please help understand why (c) is not sufficient to reset the nError pin after the warm reset ?
Can you please clarify the discrepencies vs what we understand from the TRM for transition (d), (e) and (f).
Problem is fully deterministic.
Thanks for your support.
Franck.
