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TM4C123GH6PGE: pin states while device held in reset

Part Number: TM4C123GH6PGE

Hi,

I can't find the answer to this in the data sheet - if the device is held in reset (RST lo), are the device I/O pins all tri-state?

The reason I ask is that in production I want the factory to program a serial flash chip using JTAG while it is soldered to the board and connected to the Tiva.

Thanks

Richard

  • The pins are high impedance when RST is asserted (RST low). However, if using SSI0, be aware that this module is briefly configured as a slave device immediately after reset is released if the ROM bootloader code runs.
  • Richard Bland said:
    ... want the factory to program a serial flash chip using JTAG while it is soldered to the board and connected to the Tiva (being placed w/in reset).

    I'm not so sure that, "Reliance upon MCU's behavior during "Reset" - and possibly just "prior to" or "just upon exit - proves optimal.    (clients of ours HAVE - at times - suffered issues from this practice.)

    Would it not prove "SAFER" and far more controlled - for the MCU to execute a (very small program) which (both) forces your specified pins into your desired state AND "announces such" via unique GPIO toggle - which provides a strong/solid "guardband" against (any/all) potential "Transient Conditions?"     Only upon the reception of that unique GPIO toggle - would programming of the serial flash commence.

    Following this (admittedly) more exacting procedure insures that "potential disturbances" are greatly reduced - and confirms (some) level of MCU responsiveness - prior to programming the serial flash device...

  • Hi Richard,
    One more thought. The JTAG interface is only reset at power-on. Holding RST low will not reset the JTAG pins. TDO will be high impedance while in the "Test Logic Reset" state, but will turn into an output when scanning. Do you have the JTAG of the TM4C and the serial flash separate, in parallel or in series?
  • Or you could use Segger's approach and use the JTAG interface to program the external flash.

    Why make your life more difficult by using multiple programmers?

    Robert
  • Ah - Reply now working again :) Many thanks for the replies and the support.

    Essentially I have a Tiva with a serial flash that holds the image for an fpga which is also connected to the Tiva. The Tiva boots the fpga using the image in the flash. This is a set up I have used successfully on many of my designs.

    Normally I would use the ROM Bootloader in the Tiva (over uart or usb/dfu) and our own custom software to program the virgin board and for in-field upgrades. The flash can be programmed/upgraded via the Tiva, again using custom software.

    This particular project is a retro-fit to an existing product (because of part obsolesence) and cannot use the bootloader, so I was trying to come up with a simple method for the factory to put the initial image in the Tiva and in the flash. The Tiva code will have to include a custom bootloader that can operate over the legacy connection (via the fpga). So I was hoping to figure out how to program both parts from one JTAG connector. Is this what you mean Robert?

    Richard
  • Yes, take a look at Segger, they do this for a number of external devices. I expect they are doing the same thing as they do with programming the internal flash and downloading a stub into RAM that does the programming. I haven't used it so I don't know how easy it is to configure but the support is there and expanding.

    Robert
  • May it be noted that the "Resolve-free" postings appear more compelling (surely more detailed) than the "awardee?"
  • cb1 - sorry I don't understand what you're on about!