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RE: TMS570LS3137: IO configuration and state during reset

Scott Asher
Intellectual 500 points

Hello,

I have some follow up questions related to GPIO capability.

It appears that the GPIOs associated with GIOA and GIOB are the only ones that support interrupt capability. And that using the other pins (like CAN, I2C, LIN, SCI, N2HET, etc.) for GPIO that you do not get interrupt capability on these pins for GPIO. Is this correct?

Also, section 28.6.23 for register I2CPDR in the technical reference manual, the first paragraph says a bit value of 1 enables open drain capability and a bit value of 0 disables open drain capability. But Table 28-32 says the exact opposite for fields SDAPDR and SCLPDR. Which is correct?

Also, sections 26.14.2 and 27.8.2 of the technical reference manual says that for the LIN/SCI pins used as GPIO that during reset the "pull control on the pins is enabled or disabled depending on a device-specific option. This feature is configurable for each module separately". But this seems to contradict section 4.3 of the datasheet that says the default pulls will be enabled for all I/Os during nPORRST. The datasheet indicates this is not configurable as sections 26.14.2 and 27.8.2 of the TRM seems to imply. Can you clarify this for me?

Also, the second to last sentence in the I2C section 28.5.5 of the technical reference manual says "At system reset, the pull up function of all the pins is disabled." Again, this seems to contradict section 4.3 of the datasheet that says the default pulls will be enabled for all I/Os during nPORRST. Can you clarify this for me as well?

Thanks,

Scott

 

  • 0
    TI__Guru 59540 points
    Hi Scott,

    I appreciate all the questions and want to make sure that we answer them completely; however, the topic has strayed very far from the original post's topic of WD indication by the nERROR pin. I am going to split this latest post off to a new thread in order to keep things searchable and as applicable to the title as we can. This helps us in categorizing the threads and analyzing to know where the areas of improvement are needed in our documentation, examples, and guidelines for use of our devices.
  • 0
    TI__Guru 59540 points

    Hi Scott,

    Scott Asher said:
    It appears that the GPIOs associated with GIOA and GIOB are the only ones that support interrupt capability. And that using the other pins (like CAN, I2C, LIN, SCI, N2HET, etc.) for GPIO that you do not get interrupt capability on these pins for GPIO. Is this correct?

    This is correct. functional pins do not have interrupts associated with them when they are used in their GPIO mode.

    Scott Asher said:
    Also, section 28.6.23 for register I2CPDR in the technical reference manual, the first paragraph says a bit value of 1 enables open drain capability and a bit value of 0 disables open drain capability. But Table 28-32 says the exact opposite for fields SDAPDR and SCLPDR. Which is correct?

    The text under 28.6.23 is incorrect and the table is correct. This has been updated and will be included in our next release of the TRM later this year or early 2018.

    Scott Asher said:

    Also, sections 26.14.2 and 27.8.2 of the technical reference manual says that for the LIN/SCI pins used as GPIO that during reset the "pull control on the pins is enabled or disabled depending on a device-specific option. This feature is configurable for each module separately". But this seems to contradict section 4.3 of the datasheet that says the default pulls will be enabled for all I/Os during nPORRST. The datasheet indicates this is not configurable as sections 26.14.2 and 27.8.2 of the TRM seems to imply. Can you clarify this for me?

    Also, the second to last sentence in the I2C section 28.5.5 of the technical reference manual says "At system reset, the pull up function of all the pins is disabled." Again, this seems to contradict section 4.3 of the datasheet that says the default pulls will be enabled for all I/Os during nPORRST. Can you clarify this for me as well?

    In both of these cases the Datasheet is correct. Note that for TI, the Datasheet is always the document that takes precedence when there is a conflict with the TRM or any other documentation of the device specifications. I will submit documentation bugs on each of these issues using the "document feedback link" at the bottom of each page. Certainly, if you find any other inconsistencies, you are welcome to either post in the E2E or enter the bug directly using the provided link in the documentation.

  • 0 in reply to Chuck Davenport
    Intellectual 500 points

    Thanks Chuck! This answers my questions!