TMS570LS3137: SPI RX and TX Flags. spi.c code generated by HALCoGen

Hello
Could you please help my customer with the following problem

TMS570LS3137 SPI RX and TX Flags. spi.c code generated by HALCoGen  version 04.05.01, 28.Aug.2015. CCS version 6.1.0.00104 on a standalone laptop.

When calling the spiTransmitData function, the code successfully checks for error flags

        if((spi->FLG & 0x000000FFU) !=0U)

        {

           break;

        },

gets the new data to send, then, logically, it should check the TX flag to determine whether the outputting “shift register” is clear for the new data:

        /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Hardware status bit read check" */

        while((spi->FLG & 0x00000100U) != 0x00000100U)

        {

        } /* Wait */

According to the Technical Reference Manual, spnu499b, November 2012–Revised August 2013, bit 0x00000100 is the RXINTFLG, which in my hardware is FALSE as I would expect it to be. So I tried hacking this line to become the TX flag – it ran through for the first word but then crashed.

If I use code written for me (from which I cribbed this section), the RX flag is FALSE until the chunk

        spi->DAT1 =  ((uint32)DataFormat << 24U) |

                     ((uint32)ChipSelect << 16U) |

                     (WDelay)           |

                     (Chip_Select_Hold) |

                     (uint32)Tx_Data;

Is executed, whereupon it’s set TRUE… Don’t understand… The only difference I know about is the original uses Chip_Select_Hold true, whereas mine needs to be false.

I notice that the BUFINITACTIVE flag remains set throughout the working code, but not in mine. I haven’t chosen to use the Multi-buffering feature: only the base SPI drivers have been enabled in HALCoGen (for both projects). The TXINTFLG is never obviously used.

I am calling the spiInit function as required.

Any suggestions, please.

Regards
Bob Bacon