RM57L843: Width of the virtual address space for async RAM

Marcel Ballmann

Part Number: RM57L843

Hi,

how many bits(width) is the virtual address space for one address(word) for async RAM? And in which datasheet can I find this?

Marcel

over 7 years ago

0 Chuck Davenport over 7 years ago

TI__Guru 59540 points

Hello Marcel,

The RM57 datasheet will have this information (). The addressable memory range for the asynch RAM CS are provided in the table on page 90 as shown below:

Is this the information you are looking for?

0 Marcel Ballmann over 7 years ago in reply to Chuck Davenport

Intellectual 460 points

Hi Chuck, One address has a one byte width? But what is the difference between Frame Size and Actual Size? Thank you. Best Regards Marcel

0 Chuck Davenport over 7 years ago in reply to Marcel Ballmann

TI__Guru 59540 points

Hello Marcel,

The frame size is the architectural capability of the module. i.e., we have designed the logic to handle a memory the size of the frame indication. The actual implemented memory size is the actual size of the memory for the IP.

In regard to the "virtual address space" width, have I misunderstood your question? My meaning is each address points to one byte location. Since it is a 32 bit system an int is 32 bits which will be 4 address locations. Is this what you are asking?

0 Chuck Davenport over 7 years ago in reply to Chuck Davenport

TI__Guru 59540 points

Marcel,

To be more clear for asynchronous RAM on the EMIF interface, it is a 16-bit interface. You can write a 32 bit word but it is broken into 2 16 bit writes. I apologize for the confusion. Hopefully this addresses your concerns/question.

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RM57L843: Width of the virtual address space for async RAM