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TM4C123GH6PM: PWM Inversion Synchronisation

Part Number: TM4C123GH6PM

The PWM peripheral on the TM4C family has the ability to synchronise updates to the pulse width and period with the end of the PWM period. I'm wondering if it is possible to also synchronise changes to the polarity of the output signal with the end of the PWM period.

I've tried this in practice and the change applies immediately upon calling PWMOutputInvert(). The Tivaware documentation doesn't seem to give any hint that this might be possible, and the block diagram on the TM4C123GH6PM datasheet shows PWMINVERT as part of the output control logic block rather than the PWM generator block. Nevertheless, I wanted to confirm that what I'm trying to do is not possible before throwing the idea away.

  • May it be noted that yours is (both) a perceptive & very well explained posting - great job.

    Firm/I have not been called upon to attempt what you seek - while "not" a true synchronization - might your insertion of a "gated" PWMOutputInvert() - placed almost immediately atop your PWM interrupt code - (so that the "flip" is executed (almost) in sync) - meet your sync requirement?       (appears "Good for Gov't Work" - although the gov't in question is unknown...)

    I believe that it would "interest many" if you'd be good enough to describe the "practical use" of such "sync'ed" polarity "flip."

  • cb1_mobile said:
    I believe that it would "interest many" if you'd be good enough to describe the "practical use" of such "sync'ed" polarity "flip."

    Certainly. Although it's an abuse of the PWM peripheral, the intended application is to generate a high-bandwidth Manchester-coded signal – by fixing the PWM period at 50% to represent a Manchester "one" and inverting the polarity to represent a Manchester "zero". This will only really work if the inversion is synchronised to the end of the PWM period.

    If it's stupid and it works, then it's not stupid... perhaps on another platform.

  • Nice attempt. You might consider SPI too if you haven't already. The question there would be can the micro output a stream w/o gaps between the 'characters'.

    Robert
  • Thank you - we've heard of - but cannot recall employing "Manchester coding."

    If you set the PWM Interrupt to "top dog" priority - and enable it to "pre-empt" all others - might such (assumed "slight") - co-incident timing violations - prove "unrecognized" by the decoder?

    One would hope that "freedom from such exacting time sync" would aid communication robustness. When the ARM MCU has its interrupt "promoted" as described herein - a "forgiving decoder" may accept the (very) slight signal disparity... (maybe)