DK-TM4C129X: How to maximize the SPI transmitting and receiving data rate .

Is your "F2837xD" the SPI Master?       Should that prove the case - note that the TM4C's SPI data rate - when "enslaved"- is "substantially" compromised.     (throttled back)

MCU's manual should detail the exact, "speed reduction"  -  from memory - I believe, "MCU as SPI Slave" achieves 1/4 the data rate of the same device - when operated (instead) as SPI Master.

With this understanding (agreed/accepted) - could you not set  TM4C's SPI clock - to 1/4th of its maximum rate?        Vendor's rich  API - describes & details - "just how" this may be accomplished...     It is suspected that you'd have to "strangle your F28" device (i.e. REMOVE IT from (ahem) Hi-Speed Mode) - slowing it (also) to the "Turtle-like" speed - with which "TM4C as Slave" is confined...

(you may note too that "not all" ARM MCUs - impose such (punitive) SPI speed limits - when operated as SPI Slaves...)

"Is your "F2837xD" the SPI Master?"

No, bi-direction setting.

"I believe, "MCU as SPI Slave" achieves 1/4 the data rate of the same device when it operates (instead as SPI Master.)"

For the SPI of F2837xD(220MHz), the data rate up to 50MHz, that is, 50MHz is under 1/4 the data rate.

For SPI of TM4C (120MHz), i.e., 1/4 the data rate is under 15MHz. Right?

Due to the so limited (120MHz) clock rate - and feature limitations - firm/I avoid the '129.
Again - that MCU manual provides the, "Max SPI Clock Rate" - I do not have that ready knowledge.

Do understand - should your "TM4C" be tasked as "SPI Slave" - it is ONLY THEN that this "75% reduction in SPI clock" occurs!       If instead - you can employ "multiple SPI Masters" - that speed reduction is NOT ENFORCED!        Note too - I have "no knowledge" of your "F28" (it is not an ARM) - thus it may not suffer the "75% speed reduction" when forced into SPI enslavement...     Slave, Speed reduction is a TM4C issue!

You must  "Adjust the speed of your fastest SPI device - to match that of your slowest SPI device" - is that your understanding?

Have I not provided "sufficient" guidance to warrant (also) an award of "Green?"      

Multiple (earlier) posts "prompted for" - and "teased out" the "real facts" - absent w/in poster's initial forum writing.        And these (earlier) posts provided real/substantive content - unlike the post (improperly) represented as, "This resolved my issue!"      (it did nothing of that sort!)

(the post "flagged Green" is clearly, "Content Lite!" - resolves little...)        Awarding "additional" "This post resolved my issue" is quick/easy - a simple "click away!"      (multiple posts may be clicked as resolved)

The improper & insensitive, "Removal of LIKE" is highlighted by the "gross misunderstanding" (proven here - and by so many) of the forum's recent change - which fails miserably in properly detailing WHICH posts, "Guided, Alerted and Led" to poster's issue being RESOLVED!

Hello Richard,

The answer to both questions depends on which device is the master and which is the slave.  If the TM4C129 is the master, the maximum SCLK speed it 60MHz. (Of course the physical interface must support this speed. Having to run  signals from the DK-TM4C129X to another board may make this impossible. High speed SPI is best for communication between chips on the same PCB.) In master mode the speed is set by a call the the TivaWare function shown below. In the example the speed is set to 10MHz

    SSIConfigSetExpClk(SSI0_BASE, ui32SysClock, SSI_FRF_MOTO_MODE_0,
                       SSI_MODE_MASTER, 10000000, 8);

If the TM4C is in slave mode, the speed is set by the master. However, the speed cannot be faster than 1/12th of the TM4C192 system clock. That limits the speed to 10MHz.

Thanks for your response.

Great information.

I found in the datasheet "

• Tiva C Series TM4C129ENCPDT Microcontroller Data Sheet datasheet (Rev. B)

" page 1369 providing a clock rate calculation formulation.

No further information about slave and master limitations appears.

Bob Crosby said:

... When enslaved - the SPI speed cannot be faster than 1/12th of the TM4C129 system clock.

(note: highlight reflects cb1 "edit" of the quote)

Poster made "specific mention" of his employ of another SPI MCU - that set to "High-Speed Mode" - which makes the selection of  (speed-killing) TM4C - highly questionable...

And - truth be told - represents a supreme SPI performance compromise - and renders the device "Far from competitive" - does it not?