TMDX570LC43HDK: Example of RTI trigger 5 ms in FreeRTOS project having tick 1ms

Hello Antonio,

Please enable the second RTI compare to generate triggers every 5 ms. You have to add the code manually. The RTI configuration is in the function of prvSetupTimerInterrupt(void) in os_port.c

Hy, actual setting is:

static void prvSetupTimerInterrupt(void)
{
	/* Disable timer 0. */
	portRTI_GCTRL_REG &= 0xFFFFFFFEUL;

	/* Use the internal counter. */
	portRTI_TBCTRL_REG = 0x00000000U;

	/* COMPSEL0 will use the RTIFRC0 counter. */
	portRTI_COMPCTRL_REG = 0x00000000U;

	/* Initialise the counter and the prescale counter registers. */
	portRTI_CNT0_UC0_REG  =  0x00000000U;
	portRTI_CNT0_FRC0_REG =  0x00000000U;

	/* Set Prescalar for RTI clock. */
	portRTI_CNT0_CPUC0_REG = 0x00000001U;
	portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
	portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;

	/* Clear interrupts. */
	portRTI_INTFLAG_REG     =  0x0007000FU;
	portRTI_CLEARINTENA_REG	= 0x00070F0FU;

	/* Enable the compare 0 interrupt. */
	portRTI_SETINTENA_REG = 0x00000001U;
	portRTI_GCTRL_REG    |= 0x00000001U;
}

I've to enable the compare 1 to 5ms so the setting could be just add the following register values?

        #define portRTI_CNT0_FRC1_REG   ( * ( ( volatile uint32_t * ) 0xFFFFFC30 ) )
        #define portRTI_CNT0_UC1_REG    ( * ( ( volatile uint32_t * ) 0xFFFFFC34 ) )
        #define portRTI_CNT0_CPUC1_REG  ( * ( ( volatile uint32_t * ) 0xFFFFFC38 ) )
        #define portRTI_CNT0_COMP1_REG  ( * ( ( volatile uint32_t * ) 0xFFFFFC58 ) )
        #define portRTI_CNT0_UDCP1_REG  ( * ( ( volatile uint32_t * ) 0xFFFFFC5C ) )

        /* COMPSEL0 will use the RTIFRC0 counter. */
        portRTI_COMPCTRL_REG = 0x00000000U;

        portRTI_CNT0_UC1_REG  =  0x00000000U;
        portRTI_CNT0_FRC1_REG =  0x00000000U;

        /* Set Prescalar for RTI clock. */
        portRTI_CNT0_CPUC1_REG = 0x00000001U;
        portRTI_CNT0_COMP1_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ * 5;
        portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ * 5;

sorry but is not so simple for me to implement this, 
Thanks,
Antonio

Hello Etantonio,

The RTI Compare 1 can use either counter0 or counter1. If it uses the counter0, you do need to define COMP0 and UDCP0:

#define portRTI_CNT0_COMP1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC58 ) )
#define portRTI_CNT0_UDCP1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC5C ) )

portRTI_CNT0_COMP1_REG = portRTI_CNT0_COMP1_REG * 5; //5ms
portRTI_CNT0_UDCP1_REG = portRTI_CNT0_UDCP1_REG * 5; //5ms

Set the compare 1 and 1 interrupt:
portRTI_SETINTENA_REG = 0x03;

Thanks QJ Wang,

I-ve implemented your suggest, now assuming the interrupt is available there-s the problem about how to catch it,

in fact RTI driver are not generated by HalCoGen, so I copied the file HL_reg_rti.h from another project and I also added the following notification

/* Note-You need to remove rtiNotification from notification.c to avoid redefinition */
void rtiNotification(rtiBASE_t *rtiREG, uint32 notification)
{
/*  enter user code between the USER CODE BEGIN and USER CODE END. */
    /* Toggle HET pin 0 */
    gioSetPort(hetPORT1, gioGetPort(hetPORT1) ^ 0x00000001);
}

but it is not called,

the sample project is attached, any idea about how to solve it?

Thanks for your time,

Antonio

8688.freeRTOSBlinkyAndOtherRTI.zip

Now it works, almost,

the complete procedure is the following:

1) IN HalCoGen "VIM RAM" renamed to "rtiCompare1Interrupt" interrupt 0x00000010:03
2) IN HalCoGen "VIM CHANNEL 0-31" enabled interrupt 3 RTI Compare 1
3) IN HalCoGen generate code
4) added HL_RTI.h
5) added HL_reg_RTI.h
6) added HL_RTI.c
7) in os_port.c
    added the following rows inside    /* USER CODE BEGIN (2) */
        #define portRTI_CNT0_COMP1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC58 ) )
        #define portRTI_CNT0_UDCP1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC5C ) )
        
    added the following rows at the end of method prvSetupTimerInterrupt
        /* Enable 5ms compare1 timer */
        portRTI_CNT0_COMP1_REG = portRTI_CNT0_COMP0_REG * 5; //5ms
        portRTI_CNT0_UDCP1_REG = portRTI_CNT0_UDCP0_REG * 5; //5ms
        portRTI_SETINTENA_REG = 0x03;
        
8) where is needed in your code, add:    
        #include "HL_reg_rti.h"
        #include "HL_rti.h"
        void rtiNotification(rtiBASE_t *rtiREG, uint32 notification)
        {
            //gioSetBit(hetPORT1, 0, gioGetBit(hetPORT1, 0) ^ 1);
        }

almost ok because

        portRTI_CNT0_COMP1_REG = portRTI_CNT0_COMP0_REG * 5; //5ms
        portRTI_CNT0_UDCP1_REG = portRTI_CNT0_UDCP0_REG * 5; //5ms
        portRTI_SETINTENA_REG = 0x03;

is deleted each time I generate code with HalCoGen, and there are no user blocks available in function prvSetupTimerInterrupt

I tried also to do the same during code execution with the following instructions

      rtiStopCounter(rtiREG1, rtiCOUNTER_BLOCK0);
      uint32 rtiCompare0Period = rtiGetPeriod(rtiREG1, rtiCOMPARE0);
      uint32 rtiCompare1Period = rtiCompare0Period * 5;
      rtiSetPeriod(rtiREG1, rtiCOMPARE1, rtiCompare1Period);
      rtiResetCounter(rtiREG1, rtiCOUNTER_BLOCK0);

but rtiCompare0Period seems to be always 0

attached there is the working example

0407.freeRTOSBlinkyAndOtherRTI.zip