This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM48L952: PLL frequency for lwIP

Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Hello,

We are hoping to use the lwIP stack for our project. Reading through the instructions for configuring the EMAC in HALCoGen for the lwIP demo, it says to set the PLL frequency to 160MHz. This is a significant reduction from the 220MHz we  are currently running at and obviously will have an impact on the processing performance.

Is this just a limitation on the clock multipliers/dividers for the EMAC and MDIO peripherals, or is there some other limitation? Is it possible to run the PLL at 220MHz and still use the lwIP stack?

Many thanks