Tool/software: Code Composer Studio
right now i am trying to impliment the bootloader and application project on the tms570HDK,both the bootloader and the app use UCOS-II and tftp (lwip).
most scenario you talked about are like this :
_c_int00 ;0x00 Bootloader reset
b #0x7ff8 ;0x04 undefined_instruction, branch to application
b #0x7ff8 ;0x08 software_interrupt, branch to application
b #0x7ff8 ;0x0C prefetch_abort, branch to application
b #0x7ff8 ;0x10 data_abort, branch to application
b #0x7ff8 ; reserved, branch to application
ldr pc,[pc,#-0x1b0] ;0x18
ldr pc,[pc,#-0x1b0] ;0x1C
The application vector table at the address 0x8000 should look as follows.
b _c_int00 ;0x00 application reset
b _undef_ISR; 0x04 undefined_instruction
b _swi_ISR ;0x08 software_interrupt
b _prefetch_abort_ISR ;0x0C prefetch_abort
b _data_abort_ISR ;0x10 data_abort
b _reserved_ISR ; reserved
ldr pc,[pc,#-0x1b0] ;0x18
ldr pc,[pc,#-0x1b0] ;0x1C
in all these cases ,the irq using the vector mode,and in the boot proj, the udef ,abort , swi have no ISR,,they just jump to the app‘s ISR.
so is the spna236,
but for the ucos project, the IRQ have to use index mode (legacy arm7 mode ) ,and all the exceptions have to be down in the bootloader .
can you give me some advice?
or if the sharing vectors in sram method described in spna236 works ,can you give me some specific suggestions about how to do in the app?
i am stucking here for a month ,realy need your help!
thank you !