RM57L843: CRC module with large memory areas

Hello Daniel,

Attached please find a CCS7 project for calculating CRC with semi-CPU and DMA. The data is read from flash starting at 0x0, and section size is 8160*32. You can change the project property for RM57 device. 

5483.TMS570LC4357_CRC.zip

Hello QJ,

thanks for your quick response.

My fault was or is probably in the DMA configuration.

I had set the mode to frame transfer mode, which now I changed to block transfer mode.

Your flash size in the example has got a fix size and will never changed. My files are dynamically in size and alignment. So i had to set the FRCNT and ELCNT also dynamically. But the filesize is not always divisible by 2, 4, 8, etc. What is the solution  here? Do I have to search the greatest divisor? Or shall I set the FRCNT to the filesize and the ELCNT to 1? Is it not possible to use sectors with different sizes? For example when I split a File with 150KB into three sectors with 2 times 64 KB and one time 26 KB. Below I have attached my sourcecode, thank you for your answer.

uint64_t crcCalc(crcBASE_t *crc, uint32_t addr, uint32_t size){
    static uint32_t init;
    volatile uint64 u64Signature = 0;
    if( init _EQ_ 0){
        crcInit();
        init++;
    }

    /* Enable DMA module : this brings DMA out of reset */
    dmaEnable();

    crcConfig_t sCrcParams;
    g_dmaCTRL g_dmaCTRLPKT;

 /* Configure DMA Control Packed (structure is part of dma.c) */
    g_dmaCTRLPKT.SADD      = addr;  /* initial source address */
    g_dmaCTRLPKT.DADD      = (uint32_t)(&(crcREG->PSA_SIGREGL1)); /* initial destination address */
    g_dmaCTRLPKT.CHCTRL    = 0ul; /* channel control */
    g_dmaCTRLPKT.RDSIZE    = ACCESS_64_BIT; /* read size */
    g_dmaCTRLPKT.WRSIZE    = ACCESS_64_BIT; /* write size */
    g_dmaCTRLPKT.FRCNT     = size; /* frame count */
    g_dmaCTRLPKT.ELCNT     = 1;   /* element count */
    g_dmaCTRLPKT.ELSOFFSET = 0ul << g_dmaCTRLPKT.RDSIZE; /* element source offset */
    g_dmaCTRLPKT.FRSOFFSET = 0ul << g_dmaCTRLPKT.RDSIZE; /* frame source offset */
    g_dmaCTRLPKT.ELDOFFSET = 0ul << g_dmaCTRLPKT.WRSIZE; /* element destination offset */
    g_dmaCTRLPKT.FRDOFFSET = 0ul << g_dmaCTRLPKT.WRSIZE; /* frame destination offset */
    g_dmaCTRLPKT.PORTASGN  = 1ul; /* Port A Read (Flash) - Port B Write (CRC) */
    g_dmaCTRLPKT.TTYPE     =  BLOCK_TRANSFER ; /* transfer type */
    g_dmaCTRLPKT.ADDMODERD = ADDR_INC1;     /* address mode read */
    g_dmaCTRLPKT.ADDMODEWR = ADDR_FIXED;     /* address mode write */
    g_dmaCTRLPKT.AUTOINIT  = AUTOINIT_OFF;     /* autoinit off */

    sCrcParams.crc_channel   = CRC_CH1;
    sCrcParams.mode          = CRC_SEMI_CPU;
    sCrcParams.pcount        = g_dmaCTRLPKT.ELCNT;
    sCrcParams.scount        = 1u;
    sCrcParams.wdg_preload   = 0u;
    sCrcParams.block_preload = 0u;

    crcChannelReset(crcREG, CRC_CH1);
    crcSetConfig(crcREG, &sCrcParams);

    /* Assign DMA Control Packet to Channel 0 */
    dmaSetCtrlPacket(DMA_CH0, g_dmaCTRLPKT);

    /* Trigger DMA Channel 0 s/w request */
    dmaSetChEnable(DMA_CH0, DMA_SW);

    while( (dmaREG->SWCHENAS & 1ul) | (crcREG->BUSY & 1ul) )
    {
        /* Wait until DMA finished and CRC indicates block compressed */
    }

    u64Signature = crcGetSectorSig(crcREG, CRC_CH1);

    /* Clear CH1_CCIT bit */
    crcREG->STATUS = CRC_CH1_CC;

return u64Signature;

}