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TMS570LS3137: SPI between two TMS570 Processors

Jon Pollack
Prodigy 140 points
Part Number: TMS570LS3137

I have 2 TMS570 processors on the same board and there are traces for all 4 MIBSPI1 signals between both processors. 

MISO<>MISO

SIMO<>SIMO

CLC<>CLK and

CS3<>CS3. 

I have directions and pullups and master and slave properties configured properly but I am not getting data passed. 

I am using CS_3 and TG3 for the buffered transfer.

My first question is (I think I saw this): Must I only use CS_0 when configuring an SPI on the TMS570 when used as a slave?  Is this both for compatibility mode and MIBSPI modes when the peripheral is a slave?

My second question is: Since this is a cross processor datalink without other devices on the bus, can I NOTuse the CS? and is this possible in both compatibility mode and MIBSPI mode?

Thanks,

Jon

  • 0
    TI__Guru 59540 points
    Hello Jon,

    If you are connecting two MCUs the connections should be

    MISO<>SIMO

    SIMO<>MISO

    CLC<>CLK and

    CS3<>CS3.

    If there are only these 2 nodes on the SPI link, the use of CS is not absolutely necessary and you should be able to operate in 3-pin mode in either buffered or standard modes of operation.
  • 0 in reply to Chuck Davenport
    Prodigy 140 points

    I just got a little confused now.  Isn't it supposed to be :

    Proc1 Master                             Proc 2 Slave

    MISO (pin is input)        <>        MISO (pin is output)

    SIMO (pin is output)      <>        SIMO (pin is input)

    CLK(pin is output)         <>        CLK (pin is input)

    CS(pin is output)           <>        CS (pin is input)