TMS570LC4357: PBIST: erroneous RDS value in RAMT register

Gael Le Moing

Hi,

We made some debug around PBIST controller and it seems that bit 23 of RAMT register in the PBIST controller is stuck to 1.

Our scenario involves testing the L2RAMW, which according to 2-5 of TMS570LC4357 TRM the RDS value should be among 1, 6, 11, 16, 21 or 26. In the case the algorithm selected is not supported for the memory, the RGS:RDS value read in RAMT is 0x0781, which gives RGS:7 and RDS:1 if bit 23 is replaced by 0.

Same scenario with a valid algorithm for L2RAMW: at the end of the test, without error detected, the RGS:RDS value read in RAMT register is 0x209A, which gives RGS:32 and RDS:26 if we replace bit 23 by 0.

Do you have already have the same issue?

Best regards,

Gael

over 8 years ago

0 QJ Wang over 8 years ago

TI__Guru**** 201086 points

Hello Gael,

I remember that only 5 bits of RDS are currently used in PBIST for memory selection. I will double check with design team.

0 Gael Le Moing over 8 years ago in reply to QJ Wang

Expert 1020 points

Hi QJ,

Thanks for your answer.
While you reach the design team, could you also indicate to me where I can find the information in the documentation?
Also, is there a release planned for TMS570LC4357 TRM or Datasheet including documentation bugs found by your customers and reported to you? Do you plan releases at fixed intervals?

Best regards,
Gael

0 QJ Wang over 8 years ago in reply to Gael Le Moing

TI__Guru**** 201086 points

Hello Gael,

I checked the PBIST design specification, only 5 bits of RDS are used for memory selection. I will ask our TRM owner to add this description to the next release.

0 Gael Le Moing over 8 years ago in reply to QJ Wang

Expert 1020 points

Hi QJ,
Thank you for your answer.
Does that mean that the 3 left bits can have any value and just need to be ignored?

For the TRM, you didn't answered my question: how the releases are planned and when is the next one?

Best regards,
Gael

0 QJ Wang over 8 years ago in reply to Gael Le Moing

TI__Guru**** 201086 points

Hi Gael,

The 3 left bits should be ignored. I submitted the bug ticket, and will check when the next release will be. Thank you.

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TMS570LC4357: PBIST: erroneous RDS value in RAMT register