I am trying to run a PWM with the highest temporal resolution possible. My VCLK4 is 90 MHz.
I would like to use the VCLK4 unscaled as the input clock to PWM module. However, when I set the TBCTL to have no scaling, (TBCTL = 0x0000) the time base is very long. If I put in a divide by 2, I get a time base clock of 45 MHz, and all is well. Is there a bit or other setting I have overlooked that must be set to achieve the full VCLK4 clock rate, or is there a minimum scale on the VCLK4 which must be utilized?
Thanks for any ideas.
