CCS/TM4C1294NCPDT: TM4C1294 SPI ADS127L01 ADC

Hi sir,

                  I hope this snap from tiva ware driver library user guide helps.

Regards

digvijay

digvijay khambe said:

I hope this snap from tiva ware driver library user guide helps.

First - it is great that after your "seeking assistance here" - you now "aid others" - as well.

However - your "snap" seems to "miss" the poster's request.    (a "true copy" of that request, below)

"My SPI configuration requires receiving data on a rising edge and transmitting on a falling one."

Now nowhere win your "snap" does such,  "Edge Data" identification appear - is that not so?      The "Polarity & Phase" do not provide "universal indicators" of  "Data vs. Clock Edge" - to my mind.    (and - if they do - there is an unacceptable "indirectness" therein!)

I find it strange - that vendor's MCU manual SO delays the explanation of,  "Data's relationship to clock edge."      It (finally) reveals - but SO far back - sub-optimal - I'd say...

Lukasz Huchel said:

I got confused with the Modes names. Even between TI MCUs devices PH and PL bits meaning can vary. Thanks you s lot.

That's, sadly perhaps, not  an uncommon vendor documentation issue. I have found that often the fastest and surest method of determining the phasing a particular SPI configuration will provide is the use of a scope or logic analyzer. Don't be tempted to judge correctness by the IC appearing to behave 'correctly', minor phase delays can make it appear to do so even in some incorrect modes but leave you at the mercy of process, voltage and temperature caused variations.

Robert

*** LIKE ***

Glad you expanded the "Less than Stellar" documentation note - to "multiple vendors."  

Now - are not  TWO - Separate, detailed, unrelated, "SPI Requirement Documents" forced upon us?      During each/every SPI implementation?     This EATS time & effort - does it not?     And must be repeated - each time a new device (or MCU) is engaged.     Can this (ever) be deemed, "Efficient?"

There exists - a vastly BETTER WAY! 

Does this not suggest that - even (beyond) the (educated) use of a scope or logic analyzer - that a,  "Pre-Programmed - Sequence of SPI Operations" (covering EACH of the candidate SPI Modes) would prove IDEAL?    Such could reside w/in an inexpensive "LPad" - and identify "success" (that  SPI Mode - which succeeded) - even w/out a scope or logic analyzer.    And be "Re-Used" upon multiple occasions - quickly & easily!      Expanding the time/effort & cost-savings - endlessly...

cb1_mobile said:

First - it is great that after your "seeking assistance here" - you now "aid others" - as well.

There is saying in India "dnyan dilyane dnyan wadate" means "By sharing knowledge your own knowledge increases". I just try to follow that. And as i have only 2 months of experience in tiva c, i may make mistakes. But that should not stop me. Right??

Regards,

digvijay

Indeed - that's a nice (and productive) saying.     Again - really good to discover another forum user - "Assisting others!"