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TM4C1290NCZAD: GPIO Voh characteristics

Chris Lande
Expert 6545 points
Part Number: TM4C1290NCZAD

In the datasheets for the TM4C1290 it specifies Voh to be a guaranteed 2.4V when the drive current is equal to the maximum for a given drive capability. Under what conditions can I expect Voh to be higher than 2.4V?

I have a peripheral that requires a Voh min of 2.5V, hence the question.

Thanks.

  • 0
    Guru 117855 points

    May I - humble outsider (yet w/years experience w/TM4C) - note that we have measured Voh to most always exceed 2V4 providing:

    • the load presented does not exceed the pin's specified "drive current max"
    • not too many pins - on the "same side" of the MCU - are configured as outputs - and driving "heavy loads"
    • MCU's VDD is w/in 5% of 3V3 (higher is better)
    • the 3V3 supply proves adequate to support the MCU's total output demands - w/out "dipping" when heavily loaded

    Many/most may "miss" that "care required" by potential "over-load" of one or more MCU "sides."     This is described w/in the MCU manual - and results from a reasonably "standard" - side-based - power distribution network - w/in the MCU.

    If  "all of the above" prove true - It is "expected" that you'd (easily) exceed your 2V4 output requirement.     (and/or desire)

  • 0
    Guru 27665 points
    Expect or guarantee? There is a difference.

    You can expect it to be higher under lower current, there is no guarantee. Prudent design would suggest the use of a buffer.

    I'd only forgo the use of a buffer in very large quantity designs, otherwise the effort in providing surety outweighs the cost savings. Buffers are cheap.

    Robert
  • 0
    TI__Guru*** 135355 points
    Hello Chris,

    I'm in agreement with Robert on this topic. If the peripheral requires 2.5V minimum, I don't feel that the design should be made to 'expect' the Voh to source the 2.5V, as that cannot be 'guaranteed', so a buffer would be the best approach. Though trying to save on that cost would then be matter of risk ultimately, I would say. If you think you can prevent current draw from being high and that the device won't have any other 'heavy loads', to re-quote cb1 (whose comments about TM4C power distribution should be well heeded), that would interfere and possibly take up too much current overall then chances are it would work well. But is 'well', 'well enough' for the application needs?

    TL;DR: Good design decisions will allow for 'expected' operation, but there's nothing we can 'guarantee' as far as keeping it over that 2.5V threshold.
  • 0 in reply to Ralph Jacobi
    Guru 117855 points

    In the attempt to promote "expected" to  "(very) near guaranteed" firm/I launched this quick/dirty experiment.        This was done using 5 brand new '123 LPads - after modifying all boards to provide "3V5" - rather than "3V3" - (from a recently calibrated, lab-supply.)

    Here we note our findings:   

    • "3V5" is w/in the "legal limits" (normally 10% of the MCU's 3V3) "centered voltage."     And that +10% is the MCU's max,  3.63V.
    • we monitored the voltage output (Voh) of (each) of 4 outputs - from the '123's "weakest side" (the left side) - which was spec'ed to allow up to 30mA total
    • we insured that each output sourced a "measured" 7.5mA - thus equaling the "maximum demand" placed upon on the MCU's "weakest" side
    • in all cases - "Voh" nicely exceeded 2V5 under the noted 7.5mA load - and was able to sustain that 2V5 (or better) voltage level - for up to 10 minutes  (length of our test)
    • results were highly consistent - across all 5 of our test boards  ('123 LPads - modified as noted)

    We then reduced our lab supply from "3V5" to "3V3" - and repeated that test.

    • all of our boards (continued) to reach or exceed the 2V5 target
    • all outputs "dropped" by  "0V10 to 0V12"  (0.10V to 0.12V) when compared against the earlier test (conducted @ VDD = 3V5.)     All load conditions remained the same.

    Indeed - our test sample is statistically small - yet does reveal a (possible) alternative - to the "Cost/Size adder" - imposed by a buffer IC.

    Note that we "Resisted all temptation" to lower VDD below 3V3 - and repeat our test.     It was surprising that our Voh appeared to track (w/in ~70%) our VDD increase - when raised above 3V3...

    For completeness - and due to our tech firm employing ARM MCUs from "multiple" vendors - we repeated this test upon another's Cortex M4.      Results were "very much" the same.

    Can any "guarantee" be offered - a larger population of devices - and (both) temperature & process variations - must "enter the equation."       That said - such (almost inspired) an effort - may  "Save the Day" - when an existing design,  "Just or Barely glitches."      And then ... "Who ya gonna call?"

  • 0 in reply to cb1_mobile
    TI__Guru*** 135355 points
    Hi cb1,

    Thanks for running that experiment, that's very good results to know and hopefully will be of value to Chris as he evaluates which solution makes most sense! Whilst I still (for legal reasons, as a vendor agent whose part doesn't guarantee that will hold via DS) can't fully throw my support behind not using the buffer, I would be remiss to not admit that those results are at the very least compelling data to suggest that a buffer may not be required after all. Efforts of you/your firm are much appreciated.
  • 0 in reply to Ralph Jacobi
    Guru 117855 points

    Thank you, Ralph.    As my firm runs thru (many) '123 MCUs - the 2V5 level appeared "far below" what I normally note.     (most always - Voh flirts @/above 3V0!)

    Now last evening's test - and most of my signal noting - occurs @/around "room temperature."     (70°F - although millennial, gurl staff  - accuse the cb1 "office thermometer" of being, "Offset high!")      Yet "5 out of 5" MCUs PASSING (under load) provides some - although not total - confidence.

    I will note that we often (very often) direct connect the MCU to "Character Displays" powered from 5VDC.     Such enforces (even) a higher demand upon Voh - neither staff - nor I can recall - when the '123's Voh "failed" to properly drive the display!      (many displays!)     (in fairness - the display presents "minimal load" - and I suspect that the, "Load presented by the device attached to the MCU" - very much - impacts the "device to MCU" mating.)       

    Should not the  (actual) "Load impedance" of the external device be questioned, and examined?     If not  (at/near the limits) one suspects that  ("over-caution" - resulting in "over-design") may have been elected?     Adding "potentially unneeded" components (i.e. buffer) - and the pcb interconnects - adds risk  too!      I doubt that there is one "universal" best solution...

  • 0 in reply to cb1_mobile
    Guru 27665 points

    cb1_mobile said:
    Adding "potentially unneeded" components (i.e. buffer) - and the pcb interconnects - adds risk  too!

    As does relying on unspecified behavior. If buffers were expensive and/or PCBs unreliable I would lean towards entertaining the risk. However, buffers are inexpensive and reliable so unless the volume was very high I'd not even bother questioning the possibility.

    I've been bitten more often leaving out a component that did not appear strictly necessary than having one that it turned out wasn't needed. You can always provide an alternate stuffing for a 0R jumper, an 0203 sized resistor should fit nicely.

    Robert

  • 0 in reply to Robert Adsett
    Guru 117855 points

    I continue in the belief that the "magnitude of the expected (and specified) load" should receive consideration.
    Basing each/every design decision - upon worst case parameters - especially when those prove unmet/unlikely - may prove, (unnecessary) "over-design."

    Requesting poster,  "Seized upon "Voh" levels at their limit" - yet provided "no indication" that such was (at all) likely w/in the proposed design.      We've found - in substantial contrast - that the target Voh (min) levels are "well exceeded" - even when load currents are 80% of max...    Sample size is small - yet a substantial "guardband" has been (very) well noted!