TMS570LC4357: CAP_IDLE_CYCLE bit field meaning in STCGCR0 Register

Pashan None

Genius 5660 points

Part Number: TMS570LC4357

Hello Support,

Can you please explain in detail the functional meaning of CAP_IDLE_CYCLE bit field within STCGCR0 Register?

Thank you.

Regards

Pashan

over 8 years ago

0 QJ Wang over 8 years ago

TI__Guru**** 201086 points

Hi Pashan,

It is idle cycles before and after capture clock. Inside the STC, the capture is triggered by a SCAN_EN signal.
Enabling this idle cycles will avoid routing SCAN_EN as a timing critical signal.

0 Pashan None over 8 years ago in reply to QJ Wang

Genius 5660 points

Hello Support,
CAP_IDLE_CYCLE is 3 bit field.
If it is a Boolean Flag, why is it 4 bit-field within the register?

Is it only Bit 8 to be used as Boolean Flag and Bit 9/Bit10 are No Connect?

Please confirm.
Thank you.
Regards
Pashan

0 QJ Wang over 8 years ago in reply to Pashan None

TI__Guru**** 201086 points

Hi Pashan,

For current version of STC, only bit 8 is used to enable and disable this feature. The other 2 bits may be left for future use, but I don't know the details.

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TMS570LC4357: CAP_IDLE_CYCLE bit field meaning in STCGCR0 Register