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TMS570LC4357: Does TO_ERR bit within STC will also create a CPU Reset at the end of STC SelfTest?

Pashan None
Genius 5660 points
Part Number: TMS570LC4357

Hello Support,

For case when TO_ERR bit is set within STCFSTAT during STC run, will there be CPU Reset at the end?

Thank you.
Regards
Pashan

  • 0
    TI__Guru**** 197356 points
    Hi Pashan,

    The reset is generated to the CPU on which the STC run is being performed when TEST_DONE is set (the test is completed).

    The test done flag is set to 1 for any of the following conditions:
    1. When the STC run is complete without any failure
    2. When a failure occurs on a STC run
    3. When a timeout failure occurs