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RM57L843: L2RAM Redundant Address Decoding Test

Dmitri Zakharevski59
Intellectual 905 points
Part Number: RM57L843

Hello,

I am trying to implement the L2RAM Redundant Address Decoding Test and am having trouble getting a test failure (RAMERRSTATUS reading 0x14 indicating ADDE and ADE errors).

Is there an example of this test? The documentation around it is not clear and the Safety Libarary only checks that the ADDE / ADE errors are not set, but I cant get them to ever indicate the error.

Thanks!

  • 0
    Intellectual 905 points
    I am seeking advice on how to Inject the ADDE and ADE error.

    Thanks!
    Code checking that ADDE and ADE are NOT set:

    void checkSRAMRAD (void)
    {
    /* Clear any previous diagnostic errors status bits [22,21,20,19,12,11,10, 4] - required before trigger */
    l2ramwREG->RAMERRSTATUS = 0x781C10U;

    /** Start with the equality test scheme **/
    l2ramwREG->DIAG_ECC = (uint32_t)0xCU; /* setting correct ECC value for zeroes (to avoid ecc error) */
    l2ramwREG->RAMADDRDECVECT = (uint32_t)0x400FFFFU; /* setting correct ECC value for zeroes (to avoid ecc error) */

    /* Equality check test */
    l2ramwREG->RAMTEST = (uint32_t) 0x0000008AU; /* 1->Trigger, 8->Eq., test mode, A->Test enable */

    /* Start Test */
    l2ramwREG->RAMTEST = (uint32_t) 0x00000100U;

    /* Wait for the test to complete */
    while((l2ramwREG->RAMTEST & 0x00000100U) == 0x00000100U) {}/* Wait */

    /* Check if the diagnostic error status bits have been set */
    if((l2ramwREG->RAMERRSTATUS & 0x14U) == 0x14U) /* Check for ADDE and ADE error are set */
    {
    /* Test failed */
    /* Clear the error status */
    l2ramwREG->RAMERRSTATUS |= 0x14U; /* Clear ADDE and ADE errors */
    while(1){}
    }
    else
    {
    /* Clear any previous diagnostic errors status bits [22,21,20,19,12,11,10, 4] - required before trigger */
    l2ramwREG->RAMERRSTATUS = 0x781C10U;;

    /* Then doing an inequality check in compare */
    l2ramwREG->DIAG_ECC = (uint32_t)0xCU; /* setting correct ECC value for zeroes (to avoid ecc error) */
    l2ramwREG->RAMTEST = (uint32_t) 0x0000004AU; /* 1->Trigger, 4->InEq., test mode, A->Test enable */

    /* Start Test */
    l2ramwREG->RAMTEST = (uint32_t) 0x00000100U;

    /* Wait for the test to complete */
    while((l2ramwREG->RAMTEST & 0x00000100U) == 0x00000100U) {}/* Wait */

    /* Check if the diagnostic error status bits have been set */
    if((l2ramwREG->RAMERRSTATUS & 0x14U) == 0x14U) /* Check for ADDE and ADE error are set */
    {
    /* Test failed */
    /* Clear the error status */
    l2ramwREG->RAMERRSTATUS |= 0x14U; /* Clear ADDE and ADE errors */
    while(1){}
    }

    }
    }
  • 0 in reply to Dmitri Zakharevski59
    TI__Guru 59540 points
    Dmitri,

    In the second half of your code that is executing the inequality test, and you are testing for the condition of both flags being set, and, the TRM states that in the inequality test, it is expected that the ADDR_COMP_LOGIC_FAIL flag IS set and the ADDR_DEC_FAIL flag IS NOT set. So this will be indicative of the Address Compare Logic failing, but you do not check the condition where only the ADDR_COMP_LOGIC_FAIL bit is set by itself which is the passing state such that if there was the condition ADDR_COMP_LOGIC_FAIL == 0 and ADDR_DEC_FAIL == 1 would be unexpected and I would speculate also a fail condition.

    So, in summary, you are injecting a fault into the compare logic with the expected outcome to not be both the ADDE and ADE flags being set. The fact that this passes, indicates the logic has identified the fault and is working as expected. To my knowledge there is no way to cause the compare logic itself to malfunction and generate the failing condition of this test without there truly being a hardware fault. i.e., the address compare self-test is testing the positive and negative conditions of the logic to determine its suitability for use. Anything further would be a test of the diagnostic itself and not the primary fault mechanism.