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RTOS/TM4C1294NCPDT: Timer to generate 4 different frequnecy up to 100Khz

Part Number: TM4C1294NCPDT
Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI-RTOS

I'm developing a project based on TM4C1294NCPDT, where I checking the TI-RTOS for proper implementation to generate configurable frequency clock (used to drive switch cap filter circuit) up to 100KHz. 

I initially wired up to have 4 different clock frequency (fixed 50% duty cycle) on PWM4,5,6,7, no more than 100KHz.

However, I found in the datasheet, it not possible to have a separate clock between PWM module 4 and 5 as well as  6 and 7. Thus the wiring is then changed to PWM0,2,4 and 6 so different frequency is possible. However, this upset the SPI bus (I have not used PINMUX yet to optimise). 

The plan B is to use Timer in PWM mode and have TxCCPx GPIO out.I can choose T0CCP0, T0CCP1, T1CCP0, T1CCP1 each for a different frequency, no ISR needed (free running between timer and GPIO), no distraction from firmware or ISR service to toggle the GPIO. I guess this is a better option than using PWM. 

However, I need to know how to use TI-RTOS to setup timer and how to make TI-RTOS aware not to use Timer 0 and Timer 1. 

I could not find demo code for this configuration.

R. 

  • The simplest would be to use four timers, each with their own period. Unfortunately, not many chips have that many timers.

    An alternative is to use the compare match interrupts. Essentially you set up the timer as free running, and for each compare channel, you increment it's match point in the isr . So the period for each compare channel would be the increment you use for that channel. By having different increments, you would achieve different frequencies from one timer.

    I can provide you with code pieces to get you started.

    The advantage of this approach is its ability to have different periods out of one timer. It's disadvantage is also obvious: you need isr and it's associated overhead.

  • Danny

    The TM4C1294NCPDT has 8 general purpose dual timer (Timer A and Timer B) with 16 output under PWM mode which is quite clear on Page 962 datasheet, which mean no ISR needed. To include ISR is not very efficient. TM4C1294NCPDT also have 1 PWM module with 4 sub-PWM with its own clock freq.

    Is there reason why I cannot write up c code (or non TI-RTOS code) that configure the timer to run and use semaphore to adjust timer configuration as well as ON/OFF operation. How to tell TI-RTOS that this timer 3 and 5 is reserved....thus preventing the clock library taking this timer away or cause conflicts.

    I lack demo code for this general purpose timer running on PWM mode (ideally within Ti-RTOS, but otherwise okay).

    R.
  • here is what I use to configure timers into PWM mode -> github.com/.../LM3S
    , use the pwm.c/h files.

    they are for Luminary LM3S chips and should run on TM4 chips as well, with minor modifications - mostly on pin assignments / alternate functions.

    BTW, those code uses the CMSIS start-up files so if you don't, you will need to make adjustments - minor adjustments.

    "Is there reason why I cannot write up c code ..."

    none - I did it and many others have done it as well. Just need to dug up the datasheet and code to it. hopefully the link above will help you get started.
  • Thank Danny
    I give it a try when new board arrives in new weeks time.
    BTW: Is there need to make TI-RTOS aware that these timer is reserved?
  • I have no clue. unless the rtos uses them - which I highly doubt - I don't know how to inform the rtos of their usage, or if that's even necessary. Those functions, once set up, have no software involvement - unless you want to change the frequencies.
  • By default, SYS/BIOS for the TM4 devices uses a timer instance to drive the Clock module. The Clock module obtains a timer instance statically from the "ti.sysbios.family.arm.lm4.Timer" module using the Timer.ANY argument within the Timer.create() invocation.

    This means that the Clock module will use any timer instance currently available. To inform the Timer module that you are using specific timer instances, you should set the Timer.anyMask accordingly. in your .cfg file. Bit zero of the 'Timer.anyMask' corresponds to timer 0, and so on. By clearing the corresponding bit in the anyMask, you inform the Timer module that the timer is unavailable. This will prevent users (ie the Clock module) of the Timer.ANY argument from grabbing the timer you're using.

    Below is an example of how to remove timer 0 from the list of timers obtainable using the Timer.ANY argument:

    var lm4Timer = xdc.useModule('ti.sysbios.family.arm.lm4.Timer');
    lm4Timer.anyMask = 0x3e; /* removes timer 0 from the list of timers for use with Timer.ANY */

    Alan

  • VERY nicely explained & properly detailed - thank you, Sir.

    It (does) remain curious that (almost) always - posters provide, "No justification" - for their "requirement for" the RTOS...    (it surely adds a "layer of complexity.")