TM4C1294KCPDT: Serious issues USB0 may at times POR MCU plugging in cable eventually destroys MCU

BTW: Not very fond of how Arrow shipped two test MCU's in 12" X 6" huge black plastic carrier placed in anti static bag placed in 12" x 8" foil like anti moisture bag wrapped by more antistatic bubble wrap placed in to a box. Anyone who understands atoms knows plastic polymers have an inherent electron charge and packaging MCU's in that way may have subjected them to an uneven distribution of surface charges in the hard plastic 40 MCU carrier that could have lead to some sort of unexpected extra phenomena.

That is the MCU shipping story and sticking to it. Preferably put two such MCU sandwiched between 2" x 2" black/pink anti static fine foam and placed in small anti static bag placed in a much smaller moisture bag finally a small box. Also should used anti static grounded tweezers to pick the chip (not fingers) and place onto antistatic foam. Oddly the MCU chips where not inside antistatic plastic tape real carriers another much safer way to ship two MCU.

Does not the VBUS pin working voltage of TPD4S012 (20/24v BDV) seems a bit high to protect GPIO PB1 5v tolerant VBUS analog input?

We will be testing OnSemi TVS +/-30KV ESD zener and a series 100 ohm R into PB1 to protect MCU power rail and USB0  peripheral from hub port surges on the VBUS pin PB1.

/cfs-file/__key/communityserver-discussions-components-files/908/ESD-Surge-30kv-5v-USB-VBUS-OnSemi-NSPM0051_2D00_D_2D00_1139451.pdf

BP101-

I do not think that the TPD4S012 would be causing failures in your MCU. The TPD4S012 provides a shunt path for ESD current, so if the device was failing it would cause the TPD4S012 to short and fail, rather than causing a high current path into your MCU. Can you verify where the failure is occuring? You are correct that if the TPD4S012 is wired incorrectly, it could heat up. 

I also apologize for the small size of the package making it difficult to see, the small size of our device is a very valuable advantage to many customers.

Thanks,

Alec

Hi Bob,
Thanks for the article link, makes for a good read.

>>Carbon fibers or carbon powder is combined into the molding compounds to make ESD safe trays (conductive or dissipative).

Yet not ESD free as shipping two MCU in such a huge plastic carrier in my opinion is not ESD safe. Perhaps why the first MCU had one LED dimly lit and another fully powered even before any firmware was written into flash memory. Yet DMM ohms check indicated no high resistance shorts between either of the GPIO pin PA2 & PA3 or to other pins on either side.

BP101 said:

not ESD free as shipping two MCU in such a huge plastic carrier in my opinion is not ESD safe.

Have you not - "Justified your conclusion" - by simply "Restating it?"     Such "trays" are produced in such size - to best carry many such ICs - yet have proven SAFE (often best) for even a few devices.     

Perhaps you should note that our firm - and SO MANY OTHERS - have for MANY YEARS - received such, "Matrix IC Trays" - from MULTIPLE IC Vendors - with (very few or NO) reported Shipping issues.

Can "your opinion" (which is neither explained nor justified) - in any manner - compete w/a "Long & Well Studied - then Established Shipment Technique" - employed by (almost) or (even) ALL - such Semi-Vendors?      How do you come to  "your conclusion?"      Your "proof" is most always "anecdotal" - which proves FAR from convincing - or logical...

The "Tray style" was created in answer to the need to provide adequate physical and ESD protection for the "Fragile, Multi-Leaded Devices" - which they successfully and properly "entomb" - preventing damage to those delicate MCU leads...     The fact that this packaging style - proves so NEW (and unwelcome) to you - does nothing to reduce its  clear effectiveness!

Hi Bob,

The EK-TM4C1294XL USB0 OTG port VBUS pin PB1 is not properly protected by the TPD4S012 VBUS pin zener. Four of our launch pads VBUS pins have been seriously degraded, some even seriously over temp the MCU from the very low ohmic resistance PB1 to ground.

The OTG port design omitted a series resistor to VBUS PB1 and Tiva TM4C129x design guide only source to mention an ESD safe hub for OTG designs requiring protocol signaling of VBUS pin. Might it behoove the community TI add a properly rated part on the OTG port to protect 5 volt tolerant VBUS pin PB1?

Seemingly TI should review the OTG port design or make the TPD zener more robust so that it actually protects MCU pin PB1. Other industry TVS devices are rated to properly protect VBUS DC line from over voltages, not just ESD events. Some USB hubs imported into the US are not ESD safe, nor were they properly designed to monitor VBUS for over current via TPS2052B or like device. Nor are some computers monitoring VBUS for over current and provide multiple USB ports VBUS power extending out from mother board. Many computer USB ports simply have a 48-100 ohm resistor in series with VBUS +5vdc. So the MCU pin PB1 at best is highly volatile even with minimal protection of TPD4S012.

Seems to me placing the onus on end users to provide VBUS +5vdc over current or voltage protection is not proper protocol for US engineering!

Hi Cameron,

I can't find anything wrong with TDP removed from PCB and tested via DMM compared to a new TPD but the ID pin was reading a diode drop in both directions in circuit. Perhaps the VBUS pin was not making continuity with PCB solder pad since it had no in circuit diode drop yet does when removed.

1. Can that condition cause an undesired issue of DP/DM pins 1&2, removing the ID pin from entering the MCU made no difference? The only other difference is pin 2 trace connects across top surface to pin 5/NC pad, avoids adding a VIA off the side of the ESD trace route path into TPD pin 2. 

2. Can you please specify what is the maximum reflow temperature for the TPD device and how long can it be subjected to any peak? 

Typical reflow profile for PB free HAL is ok with TPD4S012? With hot air installing new TPD roughly 4+ minutes total time; Preheat 170*C for 2 minutes then ramp up to 258*C over 80 seconds, finally 40- seconds 258*C. The HAL did not reflow TPD onto 2oz CU pads, used no clean liquid rosin prior to preheat. The previous TDP had used 270-280*C above device hot air and it seemed to reflow, it did not easily move with force after. HAL on sides of TPD appeared as if reflow occurred, viewed under 8 diopter magnification.