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CCS/TM4C123GH6PM: How to generate a 12 bit parallel output that goes from all 0's to all 1's and back to all 0's(endless loop) at speed of around 2-3Mbps..

siddharth goyal
Prodigy 60 points
Part Number: TM4C123GH6PM

Tool/software: Code Composer Studio

Is there some dedicated IC that i can use or some controller which is fit for this job..Currently i have TM4C123 microcontroller.

And if some micro controller  than what should i use to generate it like Timer,PWM etc.. and how to do that?

Further Explanation:

This Signal is given to a FMCW PLL which generate frequency depending on the value of 12 bit input... i want to produce a triangle(transmit) signal where frequency vary from 2.05Ghz to 2.3 Ghz.

All 0's = 2.05Ghz and All 1's = 2.3 Ghz...Where B=250Mhz and T=1-4 ms 

So  i need to generate a digital signal as mentioned in the post 

Image result for fmcw chirp signal

  • 0
    Guru 117855 points

    Quoting - from poster's Subject/Title:   Seek to: "generate a 12 bit parallel output that goes from all 0's to all 1's and back to all 0's(endless loop) at speed of around 2-3Mbps.."

    This proves a vastly improved version of your earlier - 5Mbps target - posting.     Much, much clearer - and your drawing further aids.    GOOD JOB!

    Now while improved - your Subject would be enhanced if you, (pardon) ...

    • Replaced your, "goes from all "0's to all 1's"
    • With,  "Sequentially advances" - 1 bit @ a time - from all "0's to all 1's"

    and only then:   (when all 12 output bits have advanced to 1 (0x0FFF))

    • "Sequentially declines" -  1 bit @ a time - from all "1's to all 0's"

    and repeats this "Up/Down Sequencing" - as commanded - w/in a loop.    

    Note the use of "Sequencing" - and 1 bit specifier - which more tightly/accurately define your objective.

    While this (may) be achievable via the MCU - this seems an "unwise" use of the MCU Resource.     And - your writing does not indicate (any) timing requirements - imposed by your, "FMCW PLL."     Such would prove helpful - would it not?

    I would suspect that such objective is "best achieved" via a simple CPLD (or FPGA) or via a "Cascade of (Controllable) Synchronous, Up/Down, Binary Counters."    (note: the CPLD/FPGA is programmed to create a "single chip version" of those "Cascaded counters.")

    Depending upon the (real) requirements of your "FMCW PLL" chip/board - you may be able to achieve "reasonable results" - by reducing those "12 digital inputs" into (just) SIX!    The frequency shift (per data presentation) will "double" - yet the span (can) remain the same.    (i.e. you would "hardwire" between ALL "UNUSED 6 Bits" - such that they could be "Cleared to 0" - when at "F_MIN" - or "Set to 1" - when at "F_MAX.")    *** No one here has seen your chip "spec" - this suggestion is, "W/in the realm" - but "theory-only" - at this early juncture!

    Even better - by reducing the "Number of bits" - you GREATLY "RAISE THE ODDS" of MCU Success!     You have reduced your design from TWO MCU Ports (to acquire 12 bits) to just one (to harvest 6 bits ... plus 1 extra bit to toggle @ F_MIN or F_MAX)    You must create a, "Six Bit, Variable Incrementing/Decrementing Function" - which can run at your desired output toggle rate.

    Note too - that in your earlier (incarnation) of this much improved posting - poster/friend "BP101" (he of (some) "reach" fame) suggested use of the "more advanced" MCU (129) which would enable use of the FAST EPI - to (potentially) achieve your goal.    

    Each/every "solution candidate" has strengths/weaknesses - you must (carefully) determine your key/critical design objectives - and proceed methodically...

  • 0 in reply to cb1_mobile
    TI__Guru 72500 points
    There are some other threads with the same or similar question that may help you:
    e2e.ti.com/.../2462047
    e2e.ti.com/.../2447197
  • 0
    Genius 3850 points
    I thought you just solved the same problem for 5Mhz sampling rate. Whatever the solution you had there would work here, at a lower sampling rate.
  • 0 in reply to Danny F
    Guru 117855 points
    It was noted that the (past) "claimed" solution was (to be kind) "theoretical" only...
  • 0 in reply to cb1_mobile
    Genius 3850 points
    Still whatever worked at 5Mhz would also work at the revised lower speed .

    So what's the point of asking the same question again?
  • 0 in reply to Danny F
    Guru 117855 points

    It is suspected that you "missed" the word "theoretical" - as "KEY" to poster's past "Solution."    ("solution" provided a quick/eased - thread exit.)

  • 0
    Genius 3850 points
    What about just some latches?

    If that's too much, shift registers would work, but you need a really fast spi.
  • 0 in reply to Danny F
    Guru 117855 points

    Why do you "downplay" the use of, "Eased & Sure to Work, Up/down, Binary Counters in cascade?"     Does such not substantially FREE the MCU for (other) tasks?     While insuring (this time) Delivery of a real solution - ON (or almost) ON TIME!