TM4C123GH6PM: UART RXFE (Receive FIFO Empty) bit of UART Flag Register shows as 1 even on reception of Serial Data with FIFO disabled

Greetings ! I am thankful for this community Forum.

Issue - Behavior of RXFE bit of UART Flag Register when FIFO is disabled

Scenario - UART0 is used with FIFO disabled. A byte of data is sent using a terminal application running on PC to the Tiva Board over UART. I see that the RXFE (Receive FIFO Empty) bit of 

the UART FR(Flag Register) is 1 even on reception of the 1 byte data sent via terminal application; thus I am unable to read using UARTCharGetNonBlocking(). The datasheet says -

If the FIFOs are disabled, the empty and full flags are set according to the status of the 1-byte-deep holding registers.

Thus, I am expecting this Flag bit to be 0 once the data is received. 

Also, As the datasheet mentions -

Both FIFOs are accessed via the UART Data (UARTDR) register.

I am able to access the byte received by directly reading the UART data register instead.

I have 2 questions here -

1. Why RXFE indicates that the UART Receive holding register is EMPTY even when I am able to read the received byte by directly accessing the UART data register ?

2. The datasheet mentions the following about the UART Data Register -

Important: This register is read-sensitive.

What does read sensitive means here ?

/*** main.c ***/

#include <stdint.h>
#include <stdbool.h>
#include <cmsis_os.h>
#include "driverlib/sysctl.h"
#include "driverlib/rom.h"
#include "UART_handler.h"

void controllerInit();

int main()
{
	controllerInit();
	UART0_init();
	while(1);
}

void controllerInit()
{
	// Set the controller Clock
	ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ);
}

/*** UART_handler.c ***/

#include "UART_handler.h"

// UART0 Interrupt Service Routine
void UART0_ISR()
{
	volatile uint32_t ui32Status, ui32ReceivedData=0;
	volatile uint8_t ui8RxData = 0;
	ui32Status = ROM_UARTIntStatus(UART0_BASE, true);
	UARTIntClear(UART0_BASE,ui32Status);
	switch(ui32Status)
	{
		case UART_INT_RX:
			{
				if(UARTCharsAvail(UART0_BASE))
					ui8RxData = UARTCharGetNonBlocking(UART0_BASE);
				else
				  ui8RxData = UART0->DR;
			}
			break;
	}
}

void UART0_init()
{
	// UART Peripheral Enable
	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
	// GPIO enable which contains UART pins
	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
	// Master interrupt enable
	ROM_IntMasterEnable();
	// COnfigure UART Rx pin
	GPIOPinConfigure(GPIO_PA0_U0RX);
	// COnfigure UART Tx pin
	GPIOPinConfigure(GPIO_PA1_U0TX);
	// Configure UART pins
	ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
	// Configure UART clock
	ROM_UARTConfigSetExpClk(UART0_BASE, ROM_SysCtlClockGet(), 115200,
													(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
													 UART_CONFIG_PAR_NONE));
	// Disable the FIFO
	UARTFIFODisable(UART0_BASE);
	// Enable UART interrupt
	ROM_IntEnable(INT_UART0);
	// Enable UART Rx interrupt
	ROM_UARTIntEnable(UART0_BASE, UART_INT_RX);
}

/*** UART_handler.h ***/

#ifndef __UART_HANDLER__
#define __UART_HANDLER__

#include <stdint.h>
#include <stdbool.h>
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "driverlib/debug.h"
#include "driverlib/fpu.h"
#include "driverlib/gpio.h"
#include "driverlib/interrupt.h"
#include "driverlib/pin_map.h"
#include "driverlib/rom.h"
#include "driverlib/sysctl.h"
#include "driverlib/uart.h"
#include "TM4C123GH6PM.h"

void UART0_init();

#endif