I'm sorry i'm forced to ask questions here and not solve this problem on my own, but i'm positively stuck at the dead end.
Here is the problem: after some time trying to comprehend manual and playing around with examples for bootloader i'm stuck with endless loop of resets. Also i'm not good with assembler or general startup algorithm, so i may be completely wrong.
Flow chart goes like this:
- [PROCESSOR INIT] 0x44
- [COPY LOOP] 0x4E
- [ZERO LOOP] 0x5E
- [BRANCH BACK TO RESET] 0x76
- [SUPPOSEDLY: CONFIGURE DEVICE] 0x8C
- [PROGRAM COUNTER TO SRAM] 0x90
- [RETURN TO 0x34 IntDefaultHandler]
For some reason Program Counter doesn't set the correct address of "Reset Handler in SRAM" (which should be 0x2000 0000) and program keeps going on and on, starting again from 0x34 to 0x44(PROCESSOR INIT) and then through 0x90(which fails again and again). Program code will be posted below.
LINKER SCRIPT
FLASH 0x00000000 0x00008000
{
RESET 0x00000000 0x00008000
{
*.o (RESET, +First)
* (InRoot$$Sections) ; all sections
;* (InRoot$$Sections, +RO) ; all sections
}
SRAM 0x20000000 0x00004000
{
* (+RO, +RW, +ZI)
}
}
STARTUP CONFIG
#define CRYSTAL_FREQ 16000000 #define APP_START_ADDRESS 0x00004000 #define VTABLE_START_ADDRESS APP_START_ADDRESS #define FLASH_PAGE_SIZE 0x00000400 #define FLASH_RSVD_SPACE 0x00001000 #define STACK_SIZE 0x0100 #define BUFFER_SIZE 32
STARTUP .S
113 00000000 #line 8 "bl_startup_TM4C123.s"
17 00000000 E000ED08
NVIC_VTABLE
equ 0xe000ed08
20 00000000 ; Put the assembler into the correct configuration.
22 00000000 thumb
23 00000000 require8
24 00000000 preserve8
25 00000000
26 00000000 ; The stack gets placed into the zero-init section.
27 00000000 area ||.bss||, noinit, align=2
29 00000000 ; Allocate storage for the stack.
30 00000000 PullStack
31 00000000 space 0x0100 * 4
33 00000400 ; This portion of the file goes into the reset section.
34 00000400 area RESET, code, readonly, align=3
36 00000000 ;******************************************************************************
37 00000000 ; The minimal vector table for a Cortex-M3 processor.
38 00000000 ;******************************************************************************
39 00000000 export __Vectors
40 00000000 __Vectors
41 00000000 00000400 dcd PullStack + (4*0x0100) ; Offset 00: Initial stack pointer
42 00000004 00000000 dcd Reset_Handler ; Offset 04: Reset handler
43 00000008 00000000 dcd NmiSR ; Offset 08: NMI handler
44 0000000C 00000000 dcd FaultISR ; Offset 0C: Hard fault handler
45 00000010 00000000 dcd IntDefaultHandler ; Offset 10: MPU fault handler
46 00000014 00000000 dcd IntDefaultHandler ; Offset 14: Bus fault handler
47 00000018 00000000 dcd IntDefaultHandler ; Offset 18: Usage fault handler
48 0000001C 00000000 dcd 0 ; Offset 1C: Reserved
49 00000020 00000000 dcd 0 ; Offset 20: Reserved
50 00000024 00000000 dcd 0 ; Offset 24: Reserved
51 00000028 00000000 dcd 0 ; Offset 28: Reserved
52 0000002C 00000000 dcd UpdateHandler ; Offset 2C: SVCall handler
53 00000030 00000000 dcd IntDefaultHandler ; Offset 30: Debug monitor handler
54 00000034 00000000 dcd 0 ; Offset 34: Reserved
120 00000044 ; Copy the code image from flash to SRAM.
121 00000044 export ProcessorInit
122 00000044 ProcessorInit
123 00000044 2000 movs r0, #0x0000
124 00000046 2100 movs r1, #0x0000
125 00000048 F2C2 0100 movt r1, #0x2000
126 0000004C import ||Image$$SRAM$$ZI$$Base||
127 0000004C 4A17 ldr r2, =||Image$$SRAM$$ZI$$Base||
128 0000004E copy_loop
129 0000004E F850 3B04 ldr r3, [r0], #4
130 00000052 F841 3B04 str r3, [r1], #4
131 00000056 4291 cmp r1, r2
132 00000058 DBF9 blt copy_loop
133 0000005A
134 0000005A ; Zero fill the .bss section.
135 0000005A 2000 movs r0, #0x0000
136 0000005C import ||Image$$SRAM$$ZI$$Limit||
137 0000005C 4A14 ldr r2, =||Image$$SRAM$$ZI$$Limit||
138 0000005E zero_loop
139 0000005E F841 0B04 str r0, [r1], #4
140 00000062 4291 cmp r1, r2
141 00000064 DBFB blt zero_loop
142 00000066
143 00000066 ; Set the vector table pointer to the beginning of SRAM.
144 00000066 F64E 5008 movw r0, #(NVIC_VTABLE & 0xffff)
145 0000006A F2CE 0000 movt r0, #(NVIC_VTABLE >> 16)
146 0000006E 2100 movs r1, #0x0000
147 00000070 F2C2 0100 movt r1, #0x2000
148 00000074 6001 str r1, [r0]
149 00000076
150 00000076 ; Return to the caller.
151 00000076 4770 bx lr
152 00000078
153 00000078 ;******************************************************************************
154 00000078 ; The reset handler, which gets called when the processor starts.
155 00000078 ;******************************************************************************
156 00000078 export Reset_Handler
157 00000078 Reset_Handler
158 00000078
159 00000078 ; Enable the floating-point unit.
160 00000078 F64E 5088 movw r0, #0xED88
161 0000007C F2CE 0000 movt r0, #0xE000
162 00000080 6801 ldr r1, [r0]
163 00000082 F441 0170 orr r1, #0x00F00000
164 00000086 6001 str r1, [r0]
165 00000088
166 00000088 ; Initialize the processor.
167 00000088 F7FF FFFE bl ProcessorInit
168 0000008C
169 0000008C import ConfigureDevice
170 0000008C F7FF FFFE bl ConfigureDevice
171 00000090
172 00000090 ; Branch to the SRAM copy of the reset handler.
173 00000090 F8DF F020 ldr pc, =(Reset_Handler_In_SRAM)
