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TMS570LS3137: HALCoGen startup code nop's after WFI in _gotoCPUIdle_

Michael Radl
Prodigy 110 points
Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN,

Hello,

I'm currently analyzing startup code for the TMS570LS3137. Similar to the code generated by HALCoGen we use a couple of nop's after a WFI statement (to start SelfTests). In HALCoGen code this can also be found in sys_core.asm _gotoCPUIdle_ . Could you explain the reason why 4 nop's are needed after the WFI instruction? I could not find any hints in the ARM or TI manuals. Are those also needed if the WFI is only called to start a SelfTest or STCTest since the CPU should then do a reset and not continue after WFI?

_gotoCPUIdle_

        WFI
        nop
        nop
        nop
        nop
        bx    lr

    .endasmfunc

Thank you very much,

Michael

  • 0
    Expert 1995 points
    One possible reason: The [bx lr] instruction needs to be on a "word/double word/quad word?" address boundary and the WFI op code is not that long. The [nop]s achieve address alignment. This is just a guess. I am not associated with TI.
  • 0 in reply to NeilBerry_at_Parker
    Prodigy 110 points
    More information on WFI according to DDI0363E_cortexr4_r1p3_trm.pdf:

    p.268
    Entry into Standby mode is performed by executing the Wait For Interrupt (WFI) instruction. To
    ensure that the entry into the Standby mode does not affect the memory system, the WFI
    automatically performs a Data Synchronization Barrier operation. This ensures that all explicit
    memory accesses occur in program order before the WFI has completed.
    p.392:
    The WFI instruction stalls the pipeline for a variable number of cycles, depending on the current
    state of the memory system.

    However this does still NOT explain the usage of the nop's.
  • 0 in reply to Michael Radl
    TI__Guru 59540 points
    Hello Michael,

    The NOPs allow for the time for the CPU to complete Data Synchronization Barrier operation prior to the execution of the next instruction. i.e., it provides a buffer between the WFI command and the bx lr instruction. Otherwise, the bx lr instruction would keep the CPU from halting and the function call would simply return and continue execution.