TMS570LC4357: GCLK2 is which bit in CDDIS register

Pashan None

Genius 5660 points

Part Number: TMS570LC4357

Hello Support,

In spnu563.pdf, Section 3.3.2 [Page 252] mentions GCLK2 in Item 2.

Can you please tell me which bit in CDDIS Register enables GCLK2?

CDDIS.0 enables GCLK1 I suppose.

Any info will help me a lot.

Thank you.

Regards

Pashan

over 7 years ago

0 Chuck Davenport over 7 years ago

TI__Guru 59540 points

Hello Pashan,

Bob should get back with you shortly on your question to confirm, but my understanding is that GCLk1 and GCLK2 are the same, i.e. GCLK, and are disabled with the GCLK bit in the CDDIS register. The only purpose of the 1 and 2 designation is to differentiate between the clock for CPU1 and CPU2.

0 Bob Crosby over 7 years ago in reply to Chuck Davenport

TI__Guru 72500 points

Hi Pashan,
Chuck is correct. On this device the two CPUs are in lock-step mode. GCLK2 is disabled along with GCLK1 by bit 0 of the CDDIS register.

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TMS570LC4357: GCLK2 is which bit in CDDIS register