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TMS570LS3134: Free-running 24-bit/32-bit counter to provide IRQ on signal edge

Chuck Wong
Genius 3875 points
Part Number: TMS570LS3134
Other Parts Discussed in Thread: TMS570LS20216

Hello there,

In our upcoming project design we need to sample at 100 MHz two separate square input signals of between 7 kHz and 12 kHz, and to provide the free-running counters (10 ns per count) via IRQ to the CPU on either a rising or falling edge of its corresponding input signal. We've learned that the N2HET is capable of running at MAX 100 MHz to provide this functionality when using the HR resolution (our LR loop will be probably 8x instructions or 80 ns).

However, as we are not entirely certain about this TMS570 capability at this point of time, and by joggling its additional effects on aeronautical product certification, we would like to reach out to see whether TI manufactures some hardware counters that can lead us to a hardware solution.

Sorry if my request is a bit off-topic for this forum, but if a TI engineer can confirm that this is feasible with the TM570, it would be great.

Many thanks.

  • 0
    TI__Guru 59540 points
    Hello Chuck,

    Also note that the maximum frequency of the device is 180MHz and the VCLK and VCLK2 clock frequencies have to be an divided down from that clock. If you should choose to run the system clock at the fastest it is capable of, VCLK and VCLK2 would be limiter to HCLK/2 or 90MHz. If, however, you can live with the reduced performance of the CPU/system clock frequency at 100MHz, then VCLK = VCLK2 = HCLK should be possible.

    With that said, the N2HET would not be able to keep up with a 100MHz sampling requirement. I do not believe that there would be any other interface that could do this either. The only peripheral that is on the device capable of a 100MHz bit rare is the Ethernet port/EMAC and I do not know of any way to us it in the manner you have described. Now ,again as you mention, there may be a way to solve this with an external component or counter but I am not aware of anything at TI that could provide that functionality. I will also copy some associates on this so they can add any other comments or information that might be helpful.

    Also, can you explain the need to sample at 100MHz when the frequencies are only 7KHz and 12KHz? I assume that the reason is realted to the tolerance/accuracy of the detection of the edges. Certainly, there would be no issues capturing these signals with our NHET. The accuracy would probably be in the range of a couple of HR loop times.
  • 0 in reply to Chuck Davenport
    Genius 3875 points
    Hi Chuck D.,

    Thanks for your reply. Yes you're right to point out that the 100 MHz is for accuracy of the detection of the edge. More precisely on our challenge is that, for example, we need to compute the pressure altitude rate and if one count of 100 MHz signifies 0.5 ft from the input, then the rate per minute error is very significant (±30 ft/min).

    I will have the following configuration for the N2HET code:

    1) N2HET functioning at VCLK2=100 MHz (MAX)
    2) LR looping at 80 ns (8 instructions MAX)
    3) HR resolution turned ON for WCAP (HR=1) to have access to 3 additional data field bits

    I might be wrong but my past understanding with the TMS570LS20216 is that the accuracy is exactly 1xHR=10 ns when the HR feature is turned ON for WCAP, which is equivalent of detecting the selected edge of the input signal at 100 MHz.

    Could you confirm?

    Thanks.
  • 0 in reply to Chuck Wong
    TI__Guru 59540 points
    Hi Chuck,

    Thanks for the additional information. Admitedly, the N2HET is not my strong suit, I will forward this post to our N2HET expert to see if they can provide confirmation.
  • 0 in reply to Chuck Wong
    TI__Guru**** 186176 points
    Hi Chuck,

    You are correct. If VCLK2=100MHz and lr=8, hr=1, the LRP will be 80ns. The HRP can delay 0~7 HRP clock cycles, and each HR clock cycle is 10ns.
  • 0 in reply to QJ Wang
    Genius 3875 points

    Hello QJ,

    Thanks for your quick reply and confirmation of my understanding.

    Just one more question: When you said the HRP can delay 0-7 HRP clock cycles, do you mean that I should subtract that many cycles from the currently read free-running counter in order to determine when the edge has actually took place? That's my understanding when interpreting the timing diagram of the RM.

    Regards!