• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 30 subscribers
  • Views 503 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/RM48L952: SPI compatabiliti mode & DMA

Mikhail Medvinskiy
Prodigy 70 points
Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

Hi,

Prompt please, where it is possible to find an example of work with SPI in the compatabiliti mode with DMA?




								


				
				

				
			

		

			
						
									
                			    			                        
						
						
			
			
						
			                        
			
			
				
			  
			

			     
			

		


				    			

						
















	

	

					
    
	
    





		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
					
    
	
    
	                                    
                      
    
                        
                          TI__Guru****
                        197036 points
                      
    
                          
                   		
		
    
					
    Hi Mikhail,
    

    
We don't have example. It is so hard to write code for SPI with DMA:
    

    
0. Init SPi (HALCoGen code)
    
1. enable DMA
    
2. Enable INT after reception of DMA data
    
3. Assign DMA request 
    
4. Config DMA control packets
    
5. Set DMA channels to trigger teh HW request
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
			
		
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to QJ Wang
					
									
    
	
    
	                                    
                      
    
                        
                          Prodigy
                        70 points
                      
    
                          
                   		
		
    
					
    I wrote this code. What is wrong?



    

    

    uint8_t s[10];
     uint8_t d[10];
    

    

    dmaEnable();
     /*------------------------------------------------*/
     dmaSetPriority(DMA_CH0, HIGHPRIORITY);
     dmaCTRL.SADD = &(spiREG1->BUF);
     dmaCTRL.DADD = d;
     dmaCTRL.FRCNT = 1;
     dmaCTRL.ELCNT = 10;
     dmaCTRL.ELSOFFSET = 0;
     dmaCTRL.FRSOFFSET = 0;
     dmaCTRL.ELDOFFSET = 0;
     dmaCTRL.FRDOFFSET = 0;
     dmaCTRL.PORTASGN = 4;
     dmaCTRL.RDSIZE = ACCESS_8_BIT;
     dmaCTRL.WRSIZE = ACCESS_8_BIT;
     dmaCTRL.TTYPE = FRAME_TRANSFER;
     dmaCTRL.ADDMODERD = ADDR_FIXED;
     dmaCTRL.ADDMODEWR = ADDR_INC1;
     dmaCTRL.AUTOINIT = AUTOINIT_OFF;
     dmaCTRL.COMBO = 0;///???;
     dmaCTRL.CHCTRL = 0;///???;
     dmaSetCtrlPacket(DMA_CH0, dmaCTRL);
     dmaReqAssign(DMA_CH0,0);
     /*------------------------------------------------------*/
     dmaSetPriority(DMA_CH1, HIGHPRIORITY);
     dmaCTRL.SADD = s;
     dmaCTRL.DADD = &(spiREG1->DAT0);
     dmaCTRL.FRCNT = 1;
     dmaCTRL.ELCNT = 10;
     dmaCTRL.ELSOFFSET = 0;
     dmaCTRL.FRSOFFSET = 0;
     dmaCTRL.ELDOFFSET = 0;
     dmaCTRL.FRDOFFSET = 0;
     dmaCTRL.PORTASGN = 4;
     dmaCTRL.RDSIZE = ACCESS_8_BIT;
     dmaCTRL.WRSIZE = ACCESS_8_BIT;
     dmaCTRL.TTYPE = FRAME_TRANSFER;
     dmaCTRL.ADDMODERD = ADDR_INC1;
     dmaCTRL.ADDMODEWR = ADDR_FIXED;
     dmaCTRL.AUTOINIT = AUTOINIT_OFF;
     dmaCTRL.COMBO = 0;///???;
     dmaCTRL.CHCTRL = 0;///???;
     dmaSetCtrlPacket(DMA_CH1, dmaCTRL);
     dmaReqAssign(DMA_CH1,1);
     /*------------------------------------------------------*/
     dmaSetChEnable(DMA_CH0,DMA_HW);
     dmaSetChEnable(DMA_CH1,DMA_HW);
                                                                              ///oneshot RXDMALINE TXDMALINE RXENA TXENA
     *( volatile uint32_t *)(0xFFF7F400U+0x0d8U) = (1<<31)|(0U<<20U)|(1U<<16U)|(1U<<15U)|(1U<<14U);//DMA0CTRL
     spiREG1->INT0 |= 0x10000U;//Turn On DMA Rq
     spiREG1->DAT0=0;///<-----for start
     xTaskDelay(2);
     spiREG1->INT0 &= ~(0x10000U);//Turn Off DMA Rq
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
			
		
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Mikhail Medvinskiy
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Guru****
                        197036 points
                      
    
                          
                   		
		
    
					
    Hello,
    

    
1. Enable SPI before enabling the SPI DMA Request
    
	   spiREG1->GCR1 = (spiREG4->GCR1 & 0xFFFFFFFFU) | 0x01000000U;  //Enable SPI
    
	   spiREG1->INT0 = (0x1 << 16); //SPI_DMAREQ; Enable DMA REQ only after setting the SPIEN bit to 1.
    

    
2. Enable DMA interrupt after dmaEnable()
    
	    /* Enable Interrupt after reception of data */
    
	    //dmaEnableInterrupt(DMA_CH0, FTC);     //Frame transfer complete
    
	    dmaEnableInterrupt(DMA_CH0, BTC);     //Block transfer complete
    
	    dmaEnableInterrupt(DMA_CH0, HBC);     //Half block transfer complete
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    •