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TM4C123GH6PM: Free running counter is a vague name used in the data sheet

Part Number: TM4C123GH6PM

Values in the GPTMTAILR and GPTMTAPR registers are loaded into the Timer A and its Prescaler. What are the names of  " Timer A and its Prescaler " ?

Also, the manual repeatedly uses the the phrase " free running counter /counters ". What are the names of these registers?

In my life, I knew a register with it's name; then with every tick ( clock or instruction cycle) increments or decrements; but this manual drove me crazy .

When I write my manual to the users, I let someone who has no clue to read it. When he understood everything then I release the manual.

  • Feel your pain - yet you ARE "making progress" - and the ARM MCU has capabilities FAR EXCEEDING those of your past devices...

    Shamson said:
    What are the names of  " Timer A and its Prescaler "

    Your (perhaps) more focused read of the MCU Manual should reveal that the '123 MCU employs SIX  (normal width) "TIMERS" ... and ... SIX (expanded width) "TIMERS."     Thus - when you "seek the names of  "Timer_A and its Prescaler" - you must be (more) precise.     Which one - of the MANY - receives your focus?   

    To best assist - follows the detailed "List of MCU Timers" - extracted from the MCU Manual:    

    Note: the MCU manual placed this chart (broke this chart) across 2 pages - T0CCP0 & T0CCP1 (should) have appeared "atop" this listing.

    The manual goes on to note (to your question): "The main components of each GPTM block are two free-running up/down counters (referred to as Timer A and Timer B)"   To further clarify - if you examine the top of the chart listing - "T1CCP0 represents Timer A" while "T1CCP1 represents Timer B."    This directly answers your question - does it not?    Indeed this is (somewhat) strange (maybe) - but it is - what it is.    And has now been detailed for you...

    Shamson said:
    repeatedly uses the the phrase " free running counter /counters ". What are the names of these registers?

    Myself/others - happen to LIKE the choice, "Free Running Counter(s)."    What do "you" propose - as superior?    And - "Free Running" (properly) conveys the fact that (unless) the Timer is "commanded" to One-Shot Mode - the Timer runs throughout its "full range" - and then (endlessly) repeats - thus "Free Running."   NOTHING "VAGUE" in that - my friend!    (even after law-school - I can't improve upon that wording...)    And - "Squawking" - minus (any) alternative - proves "unimpressive.")    

    Once more - to discover the names of these "counters/registers" the MCU manual rescues.



    Your studied review of this data - perhaps w/a "few more" questions - should well answer your needs.

    You may note that I,  "Am  No apologist - for this (or any other) MCU Vendor."    But your comparing/contrasting (your) "manual production skills" versus those here - is highly unfair - is it not?     Does your manual exceed 1K pages - with key diagrams - over 15 Sections - and pages of detailed specifications?     (highly doubtful - is it not?)

    Yours is part of the "normal" learning curve - we each must EXPECT - and (even) ... (maybe) WELCOME CHANGE!   (Ha!)    

    The MCU manual - and Driver User Guide - will become your "Best Friends" - and should be (better) accommodated - they are EFFECTIVE Guides!

  • Hi Shamson,

     Sorry that the datasheet is no clear to you. I guess it wasn't clear to me the first time either. I will elaborate a bit more on top of cb1's detailed explanation.

    Shamson said:
    Values in the GPTMTAILR and GPTMTAPR registers are loaded into the Timer A and its Prescaler. What are the names of  " Timer A and its Prescaler " ?

    Basically, a timer will have a counter that either counts up or downs according to how you program it. When you are counting down it needs to start from somewhere. When you are counting up, the counter starts from 0 and it needs to end somewhere. That somewhere is the GPTMAILR (the Timer A Interval Load) register. The GPTMAPR is the prescaler register which is optional. It is used to pre-scale your timebase. The timer module uses SYSCLK as the clock source. You can use the prescale register to divide the SYSCLK into a timebase that is suitable for your application.

    Shamson said:
    Also, the manual repeatedly uses the the phrase " free running counter /counters ". What are the names of these registers?

    The counter is memory mapped. While the counter is either counting up or down you can watch the value using the GPTMAV register. This value is always counting and hence it is called a free-running counter. If you want to take a snapshot of the counter you can read via the GPTMAR. Think of it that you are saving a snapshot of the free running counter value from the GPTMAV into the GPTMAR register. 

  • Dear cb1_mobile,
    You did not answer my question. I'm talking from hardware prospective, there is no free running counter or timer. There a register, we can call it counter. There is a clock that drives the register through a gate. The gate enables/disable the clock accessing to the register. Therefore, there is no free running counter/register. let's use GPTMTAxxxx ,which is an offset of Timer 0, Timer 1,....., or Timer 5 , as an example. Then, GPTMTAV and GPTMTAPV are the counters. Of course GPTMTAPV is an option. Any comments?
    Thanks
  • May I - rather completely - DISAGREE?    Are you NOT, "Simply playing w/words?"    Myself - and staff - believe that your question was VERY WELL ANSWERED!

    Endless (and tortured) protest - when directed at those who devoted  good, "time/effort" IN YOUR BEHALF - registers as NOT too mature - & may  "NOT BEST SERVE YOU..."

    The "gate" which may enable or disable the "FREE RUNNING COUNTER"  is not an integral part of the counter - thus your logic proves faulty.     Might we "extend" your flawed logic - can the "FREE RUNNING COUNTER" be halted - by  (simply) REMOVING POWER?    That's as valid as your example - is it not?     If your attempt is to be "provocative" - I've no interest...

    Should you "Admit Reality" ...  hundreds - perhaps thousands ... before you - have each encountered,  "FREE RUNNING COUNTER" - and (only you) have,  "Risen in Protest!"    That's TELLING - is it not?

  • "there is no free running counter or timer. "

    a mcu is a programmable device. So whether a timer is free-running or not is dependent on your code.

    "Of course GPTMTAPV is an option. "

    not sure what that means.

    I think you have a particular approach to timers and vocabulary perfectly clear to you to understand how timers should work.

    Unfortunately we live in a world where we cannot impose our views onto everyone so you have to listen and think carefully along a framework others may have dictated to you. if you don't like the hand you have been dealt with, walk away. I'm sure there are vendors out there who are more than happy to design for you a mcu that fits your thought process, if you offer enough enticement.

  • Dear Charles,

    With every tick , the value of GPTMTAV is transferred into GPTMTAR or GPTMTAR inc/dec with GPTMTAV ?
    The other question, GPTMTAV is transferred into GPTMTAR only when an event or interrupt occurs (under periodic and snapshot config)?
    Of course the prescale reg. goes with GPTMTAV, I didn't mention it.

    I'm detail oriented. I'm learning from the manual. Others may be through seminars or lectures , where the instructor gives the name "free running" to a particular register. Even later if he uses the name " free running", the audiences know which register. I figured out , it's the one with the suffix "V".

    Thanks and I'm waiting for your answers
  • Hi Danny,
    "Of course GPTMTAPV is an option. "
    not sure what that means.?

    Option means for prescale the counter if you want.

    I have no choice to use from other vendors, TI is very stable company and the way to go

    Thanks
  • Shamson said:
    With every tick , the value of GPTMTAV is transferred into GPTMTAR or GPTMTAR inc/dec with GPTMTAV ?

    The GPTM module can be put into various operating modes. If you are in regular periodic timer mode then at the time you read the GPTMTAR register, a snapshot of the GPTMTAV is transferred into GPTMTAR. But if you are in the so called snap-shot mode then the value in the GPTMTAV is transferred to the GPTMTAR automatically at the time-out event. This feature allows you to calculate the timestamp difference from the time the time-out event happens until the the GPTMTAV is read. Below is an excerpt from the datasheet to measure the time it takes from the time-out interrupt occurrence until the ISR entry. 

    In periodic, snap-shot mode (TnMR field is 0x2 and the TnSNAPS bit is set in the GPTMTnMR
    register), the value of the timer at the time-out event is loaded into the GPTMTnR register and the
    value of the prescaler is loaded into the GPTMTnPS register. The free-running counter value is
    shown in the GPTMTnV register. In this manner, software can determine the time elapsed from the
    interrupt assertion to the ISR entry by examining the snapshot values and the current value of the
    free-running timer. Snapshot mode is not available when the timer is configured in one-shot mode.

    Let me know if this answers your question.

  • "Option means for prescale the counter if you want."

    that requires some translation, I think.

    "I have no choice to use from other vendors,"

    then it is probably more productive to get used to TI's way of thinking, rather than arguing how they should have articulated how their parts work in a way conducive to you - others don't seem to have the kind of issues you do.
  • Dear Charles,
    You clarified and answered my questions. Thanks
  • Thanks Danny