Hello,
When I perform DEBUG-HALT-RESET cycle from CCS 3.3 with my CPU board, what will be the contents of all the Peripheral Registers?
Will it revert back to Power ON Reset value as specified within TRM for various Registers?
Specifically, what will happen to all the GIO mode configured Port Pins for all the Peripherals?
Will they all be LOW when I perform DEBUG-HALT-RESET?
Thank you.
Regards
Pashan