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TMS570LS0432: What is Latch-up performance?

Part Number: TMS570LS0432

Hi Team,

 

What is Latch-up performance at 5.1 Absolute Maximum Ratings in the datasheet (SPNS186B) for TMS570LS0432 ?

How to test it?

Do you have any document for this test?

The customer wants to know it.

 

Thanks and Best regards,

Kuerbis

  • Latch-Up is a condition where a low impedance path is created between a supply pin and ground. This condition is caused by a trigger (current injection or overvoltage), but once activated, the low impedance path remains even after the trigger is no longer present. . Latch-Up is not a risk if the voltage and current levels applied to the device adhere to the absolute maximum ratings.

    100mA is the maximum current what can be injected into pin by voltage outside rails without causing latchup.

    Please refer to JEDEC standard JESD78 for the details