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CCS/RM57L843: DMA access for EMIF async interface

Part Number: RM57L843


Tool/software: Code Composer Studio

Hi,

I want to make a DMA access for EMIF Interface. I have connected a async DRAM 16bit to EMIF pins. I have no clue how I can make a DMA access to EMIF pins. Do you have a application note or sampe code for EMIF async access?

BR

Marcel

  • Hi Marcel,

    I don't find my sample project using DMA to copy data from an external SRAM.

           dma_config.SADD = (uint32_t)0x60000000;

    dma_config.DADD = (uint32_t)0x08002000;

    dma_config.CHCTRL = 0;                            

    dma_config.FRCNT = 1;

    dma_config.ELCNT = transfer_size;

    dma_config.ELDOFFSET = 0;

    dma_config.ELSOFFSET = 0;

    dma_config.FRDOFFSET = 0;

    dma_config.FRSOFFSET = 0;

    dma_config.PORTASGN  = PORTA_READ_PORTA_WRITE;

    dma_config.RDSIZE    = ACCESS_32_BIT;

    dma_config.WRSIZE    = ACCESS_32_BIT;

    dma_config.TTYPE     = FRAME_TRANSFER;

    dma_config.ADDMODERD = ADDR_INC1;

    dma_config.ADDMODEWR = ADDR_INC1;

    dma_config.AUTOINIT  = AUTOINIT_ON;

  • Hi,

    Thank you. This is only the configuration, right? How I can read and write like in normal mode? And in which file I have this code?

    BR

    Marcel

  • Hi Marcel,

    The following code can be used to move data from MCU RAM to EMIF SDRAM, and from SDRAM to RAM.

    /* Include Files */

    #include "HL_sys_common.h"

    /* USER CODE BEGIN (1) */
    #include "HL_emif.h"
    #include "HL_sys_dma.h"
    #include "HL_sys_core.h"


    /* example data Pattern configuration */
    #define E_COUNT 64 /*Element count*/
    #define F_COUNT 16 /*Frame count*/
    #define D_SIZE E_COUNT * F_COUNT


    void loadDataPattern(uint32 psize, uint32* pptr, uint32 pattern);


    #pragma SET_DATA_SECTION(".sharedRAM")
    uint32 TXDATA_RAM[D_SIZE]; /* transmit buffer in sys ram */
    uint32 RXDATA_RAM[D_SIZE]= {0}; /* receive buffer in sys ram */
    g_dmaCTRL g_dmaCTRLPKT1, g_dmaCTRLPKT2; /* dma control packet configuration stack */

    #pragma SET_DATA_SECTION()

    /* USER CODE END */

    /** @fn void main(void)
    * @brief Application main function
    * @note This function is empty by default.
    *
    * This function is called after startup.
    * The user can use this function to implement the application.
    */

    /* USER CODE BEGIN (2) */
    /* USER CODE END */

    int main(void)
    {
    /* USER CODE BEGIN (3) */
    /* enable IRQ interrupt */
    uint16 i;
    unsigned int *Addr32 = (unsigned int *)0x80001000; //08076000;
    for(i=0;i<64;i++)
    *Addr32++ = i+0xEFEFAB00;

    _enable_IRQ_interrupt_();

    emif_SDRAMInit();
    /* - creating a data chunk in system ram to start with ... */
    loadDataPattern(D_SIZE, &TXDATA_RAM[0], 0x5A5A5A5A);

    /* - configuring dma control packets */
    g_dmaCTRLPKT1.SADD = (uint32)TXDATA_RAM; /* source address */
    g_dmaCTRLPKT1.DADD = (uint32)(0x80000000); //(0x08078000); /* destination address; SDRAM */
    g_dmaCTRLPKT1.CHCTRL = 0; /* channel control */
    g_dmaCTRLPKT1.FRCNT = F_COUNT; /* frame count */
    g_dmaCTRLPKT1.ELCNT = E_COUNT; /* element count */
    g_dmaCTRLPKT1.ELDOFFSET = 0; /* element destination offset */
    g_dmaCTRLPKT1.ELSOFFSET = 0; /* element destination offset */
    g_dmaCTRLPKT1.FRDOFFSET = 0; /* frame destination offset */
    g_dmaCTRLPKT1.FRSOFFSET = 0; /* frame destination offset */
    g_dmaCTRLPKT1.PORTASGN = PORTA_READ_PORTA_WRITE;
    g_dmaCTRLPKT1.RDSIZE = ACCESS_32_BIT; /* read size */
    g_dmaCTRLPKT1.WRSIZE = ACCESS_32_BIT; /* write size */
    g_dmaCTRLPKT1.TTYPE = FRAME_TRANSFER ; /* transfer type */
    g_dmaCTRLPKT1.ADDMODERD = ADDR_INC1; /* address mode read */
    g_dmaCTRLPKT1.ADDMODEWR = ADDR_INC1; /* address mode write */
    g_dmaCTRLPKT1.AUTOINIT = AUTOINIT_OFF; /* autoinit */


    g_dmaCTRLPKT2.SADD = (uint32)(0x80001000); //0x08076000); /* source address */
    g_dmaCTRLPKT2.DADD = (uint32)RXDATA_RAM; /* destination address */
    g_dmaCTRLPKT2.CHCTRL = 0; /* channel control */
    g_dmaCTRLPKT2.FRCNT = F_COUNT; /* frame count */
    g_dmaCTRLPKT2.ELCNT = E_COUNT; /* element count */
    g_dmaCTRLPKT2.ELDOFFSET = 0; /* element destination offset */
    g_dmaCTRLPKT2.ELSOFFSET = 0; /* element destination offset */
    g_dmaCTRLPKT2.FRDOFFSET = 0; /* frame destination offset */
    g_dmaCTRLPKT2.FRSOFFSET = 0; /* frame destination offset */
    g_dmaCTRLPKT2.PORTASGN = PORTA_READ_PORTA_WRITE;
    g_dmaCTRLPKT2.RDSIZE = ACCESS_32_BIT; /* read size */
    g_dmaCTRLPKT2.WRSIZE = ACCESS_32_BIT; /* write size */
    g_dmaCTRLPKT2.TTYPE = FRAME_TRANSFER ; /* transfer type */
    g_dmaCTRLPKT2.ADDMODERD = ADDR_INC1; /* address mode read */
    g_dmaCTRLPKT2.ADDMODEWR = ADDR_INC1; /* address mode write */
    g_dmaCTRLPKT2.AUTOINIT = AUTOINIT_OFF; /* autoinit */

    /* - setting dma control packets */
    dmaSetCtrlPacket(DMA_CH1,g_dmaCTRLPKT1); //tx
    dmaSetCtrlPacket(DMA_CH0,g_dmaCTRLPKT2); //rx

    /* - setting the dma channel to trigger on h/w request */
    dmaSetChEnable(DMA_CH1, DMA_SW);
    dmaSetChEnable(DMA_CH0, DMA_SW);

    /* Enable Block Transfer Complete interrupt for the receive after transfer complete */
    dmaEnableInterrupt(DMA_CH0, BTC, DMA_INTA);


    dmaEnable();

    while(1); /* loop forever */

    /* USER CODE END */

    return 0;
    }


    /* USER CODE BEGIN (4) */

    /** void loadDataPattern(uint32 psize, uint16* pptr)
    *
    * loading a randam data chunk into system ram
    *
    * pptr > sys ram address
    * psize > chunkl size
    *
    */
    void loadDataPattern(uint32 psize, uint32* pptr, uint32 pattern)
    {
    int i;
    for(i=0;i<psize;i++)
    {
    *(pptr++) = pattern + i;
    }
    }

    /* USER CODE END */
  • Thank you QJ, that is very informative. But where does the magic happen? Where does the data tansfer occurs? Is not something missing after dmaEnable? Best Regards Marcel