TM4C123GH6PM: SPI EOT (End Of Transmission) interrupt can be triggered, but can not raise the interrupt flag

Mourad Rashwan

Part Number: TM4C123GH6PM

SPI EOT (End Of Transmission) interrupt can be enabled by setting the EOT bit in the SSICR1 (SSI Control 1) register, and setting the TXIM bit in the SSIIM (SSI Interrupt Mask) register, to enable the transmit FIFO Interrupt.

The EOT interrupt is actually triggered (in Freescale SPI mode, the interrupt is triggered for each word transmitted), but it does not raise the TXRIS flag in the SSIRIS (SSI Raw Interrupt Status) register.

Is it a hardware bug ?!

over 7 years ago

0 Ralph Jacobi over 7 years ago

TI__Guru*** 135355 points

Hello Mourad,

Yes, there is an errata item for the device covered in our Errata document as case SSI#07 which includes a workaround: http://www.ti.com/lit/er/spmz849f/spmz849f.pdf

0 Mourad Rashwan over 7 years ago in reply to Ralph Jacobi

Prodigy 90 points

But there is no workaround for my case SSI#07 Condition 2

0 Ralph Jacobi over 7 years ago in reply to Mourad Rashwan

TI__Guru*** 135355 points

Hello Mourad,

Yes, sorry I didn't recognize it as Condition 2 when reading the post last night. If the issue is based on Condition 2 regarding the interrupt triggering, perhaps this posting from another user may help you with coding something workable for your use case: https://e2e.ti.com/support/microcontrollers/tiva_arm/f/908/p/630889/2330363#2330363

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TM4C123GH6PM: SPI EOT (End Of Transmission) interrupt can be triggered, but can not raise the interrupt flag