This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TM4C129ENCPDT: I2CMCLKOCNT - default value does not meet documented requirements

Part Number: TM4C129ENCPDT

The I2CMCLKOCNT register (I2C Master Clock Low Timeout Count) has a default power-up value of 0x00. The data sheet says that the value must be greater than 0x1. This raises a number of questions.

1) What does the default power-up value of 0x00 actually do? Does it disable the timeout measurement feature and its related interrupt?

2) What would a value of 0x1 do? Undocumented / unsupported behavior? (not that I would bother to write that value into the register)

Actually, question 1 serves dual purposes, since I'm also curious whether this feature can be enabled or disabled, as well as wanting to know how the default value can be technically illegal, according to the data sheet.

  • Hi Brian,
    An interesting question. Unfortunately after about two hours of digging, I have still been unable to find the answer. I will pass your question on to the design team, but it is unlikely I will get a quick response.
  • You can mask the interrupt this timer triggers. Is the datasheet's statement "the master state machine forces ABORT on the bus by issuing a STOP condition" independent of the interrupt?

  • Thanks, Bob. Boards are still being designed, so hopefully I've asked this question early enough for everything to fall in to place.

  • Sorry for the delay. A value of 0 in the I2CMCLKOCNT register disables this feature (allows SCLK to be held indefinitely). A value of 2 or greater causes the master state machine to issue a STOP condition if SCLK is held low longer than the timeout period independent of the timeout interrupt being enabled or not. A value of 1 in the I2CMCLKOCNT register causes the Master to generate a STOP condition before it has finished transmitting its data, this value should not be used.
  • Thank you, Bob.
    Excellent and prompt response.
    It there a separate process for getting this information updated in the reference manuals? I see revision 'B' as of 2014 and wonder whether there might be a new revision with this clarification and perhaps others (such as bringing in conflicting data from the Errata, such as the need for a biasing resistor on the ethernet RBIAS pin even when the peripheral is unused - see p.1588 versus ETH#03)
    Not to mingle another issue with this thread, but just an example of out-of-date information.
  • Hi Brian,
    I have made a note that this information should be added. Revision B from 2014 is the latest version.