TMS570LC4357: TMS570LC4357 emif data abort

Lars Guenther

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi all,

I have a problem with the emifGetConfigValue function. I am reading in my software every 100ms the emif configuration register (else case). The activation of the 100ms is implemented via interrupt.
The software is working fine but after houres (1 up to 4h) a got a data abort.

In the data abort situation I read out the following infos:

LR Register (Stackpointer)
seteDataFaultAddress = _SL_Get_DataFault_Address();
seteDataFaultStatus = _SL_Get_DataFault_Status();

Both the stack pointer and the fault address are showing to one of the emif Register (red marked).

void emifGetConfigValue(emif_config_reg_t *config_reg, config_value_type_t type)
{
    if (type == InitialValue)
    {
        config_reg->CONFIG_AWCC    = EMIF_AWCC_CONFIGVALUE;
        config_reg->CONFIG_SDCR    = EMIF_SDCR_CONFIGVALUE;
        config_reg->CONFIG_SDRCR   = EMIF_SDRCR_CONFIGVALUE;
        config_reg->CONFIG_CE2CFG = EMIF_CE2CFG_CONFIGVALUE;
        config_reg->CONFIG_CE3CFG = EMIF_CE3CFG_CONFIGVALUE;
        config_reg->CONFIG_CE4CFG = EMIF_CE4CFG_CONFIGVALUE;
        config_reg->CONFIG_CE5CFG = EMIF_CE5CFG_CONFIGVALUE;
        config_reg->CONFIG_SDTIMR = EMIF_SDTIMR_CONFIGVALUE;
        config_reg->CONFIG_SDSRETR = EMIF_SDSRETR_CONFIGVALUE;
        config_reg->CONFIG_INTMSK = EMIF_INTMSK_CONFIGVALUE;
        config_reg->CONFIG_PMCR    = EMIF_PMCR_CONFIGVALUE;
    }
    else
    {
    /*SAFETYMCUSW 134 S MR:12.2 <APPROVED> "LDRA Tool issue" */
        config_reg->CONFIG_AWCC     = emifREG->AWCC;
        config_reg->CONFIG_SDCR     = emifREG->SDCR;
        config_reg->CONFIG_SDRCR    = emifREG->SDRCR ;
        config_reg->CONFIG_CE2CFG   = emifREG->CE2CFG;
        config_reg->CONFIG_CE3CFG   = emifREG->CE3CFG;
        config_reg->CONFIG_CE4CFG   = emifREG->CE4CFG;
        config_reg->CONFIG_CE5CFG   = emifREG->CE5CFG;
        config_reg->CONFIG_SDTIMR   = emifREG->SDTIMR;
        config_reg->CONFIG_SDSRETR = emifREG->SDSRETR;
        config_reg->CONFIG_INTMSK   = emifREG->INTMSK;
        config_reg->CONFIG_PMCR     = emifREG->PMCR;
    }
}

My EMIF Clock frequency is 10MHz and I use the default settings from HalCoGen but I implemented a MAX_EXT_WAIT of 100.

Do you have any ideas ?

Best regards
Lars

over 7 years ago

0 QJ Wang over 7 years ago

TI__Guru**** 197006 points

Hello Lars,

The processor takes the data abort if data should be read from or written to a protected or faulty memory location. This could be because of:

• The memory location is not implemented
• The memory location is read or write only in privileged mode (when processor is in User mode)
• The memory location is read or write protected by the MPU
• If an error is detected in the data by the ECC checking logic Data aborts can be precise or imprecise

0 Lars Guenther over 7 years ago in reply to QJ Wang

Intellectual 675 points

Hi,
the data Abort is detected after 1h, 2h,3h or more hours running the System. We do not change the memory setting if the system is running. The memory settings is done once in the HL_startup.c file.

If I got the data Abort I have the following information:
Data fault address : 0xFCFFE8xxh, that means the access of one of the emif Register is corrupted. I have also the stack pointer (LR Register) and this one is shown to the following code lines :

void emifGetConfigValue(emif_config_reg_t *config_reg, config_value_type_t type)
{
if (type == InitialValue)
{
config_reg->CONFIG_AWCC = EMIF_AWCC_CONFIGVALUE;
config_reg->CONFIG_SDCR = EMIF_SDCR_CONFIGVALUE;
config_reg->CONFIG_SDRCR = EMIF_SDRCR_CONFIGVALUE;
config_reg->CONFIG_CE2CFG = EMIF_CE2CFG_CONFIGVALUE;
config_reg->CONFIG_CE3CFG = EMIF_CE3CFG_CONFIGVALUE;
config_reg->CONFIG_CE4CFG = EMIF_CE4CFG_CONFIGVALUE;
config_reg->CONFIG_CE5CFG = EMIF_CE5CFG_CONFIGVALUE;
config_reg->CONFIG_SDTIMR = EMIF_SDTIMR_CONFIGVALUE;
config_reg->CONFIG_SDSRETR = EMIF_SDSRETR_CONFIGVALUE;
config_reg->CONFIG_INTMSK = EMIF_INTMSK_CONFIGVALUE;
config_reg->CONFIG_PMCR = EMIF_PMCR_CONFIGVALUE;
}
else
{
/*SAFETYMCUSW 134 S MR:12.2 <APPROVED> "LDRA Tool issue" */
config_reg->CONFIG_AWCC = emifREG->AWCC;
config_reg->CONFIG_SDCR = emifREG->SDCR;
config_reg->CONFIG_SDRCR = emifREG->SDRCR ;
config_reg->CONFIG_CE2CFG = emifREG->CE2CFG; <-- Stack pointer had the address of this register
config_reg->CONFIG_CE3CFG = emifREG->CE3CFG;
config_reg->CONFIG_CE4CFG = emifREG->CE4CFG;
config_reg->CONFIG_CE5CFG = emifREG->CE5CFG;
config_reg->CONFIG_SDTIMR = emifREG->SDTIMR;
config_reg->CONFIG_SDSRETR = emifREG->SDSRETR;
config_reg->CONFIG_INTMSK = emifREG->INTMSK;
config_reg->CONFIG_PMCR = emifREG->PMCR;
}
}

Best regards
Lars

0 QJ Wang over 7 years ago in reply to Lars Guenther

TI__Guru**** 197006 points

Hi Lar,

The data abort can be either precise abort or imprecise abort. Precise abort is synchronous abort, the abort is guaranteed to be taken on the instruction that generated the aborting memory access. r14_abt can be used to determine the instruction generated the abort. The imprecise abort is an asynchronous abort, the abort is taken on a later instruction to the instruction that generated the aborting memory access. This means the address in r14_abt is not the instruction generated the abort.

DFSR (CP15 register) has the type of abort and whether it occurs on a read or a write.

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TMS570LC4357: TMS570LC4357 emif data abort