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TM4C1290NCPDT: WR and RD signals swap between HostBus and GP mode?

Part Number: TM4C1290NCPDT

Why does the RD and WR signals Swap between the two modes.

There is no ability to change the Setup and Hold Times for address and Data and the only way to change is to switch modes but these two signals swap?

I am interfacing with a HLDO-2416.  this part only requires 10ns of address setup time to the falling edge of ~WR and requires Data hold time after the rising edge or ~WR.

I assume it is cut and jump time now, just curious why this limitation was placed in the hardware.

  • Agreed that this DOES seem (most) strange!    (Multiple (other) ARM MCUs - AVOID such (unwanted) SWAP!)

    May I suggest that PRIOR to any "board surgery" - you await the arrival - and commentary - of Vendor Agents?

    It is NOT UNKNOWN for a "Document Error" (often cut n paste) to be the source of such (unusual) circuit (documentation)...

  • Sorry, I do not know why those two signals are swapped between the different modes.