CCS/TMS570LC4357: crc | dma

Tool/software: Code Composer Studio

Hi 

I have configured the crc channel1 and mode as AUTO and enabled CRC Fail interrupt and PSA s/w interrupt in halcogen.

I am using DMA channel 2 and channel 3.

but i am not getting the proper values in PSA_SIGREGL1 register .

sys_main.c code:-

#include "HL_sys_common.h"
#include "HL_system.h"
#include "HL_esm.h"
#include "HL_sys_core.h"
#include "HL_sys_dma.h"
#include "FreeRTOS.h"
#include "HL_crc.h"

#define D_SIZE 8
uint32_t CRC1_Ref[2] = {0x5F7EAE33, 0x6233774E};

void Driver_Init(void);
void DmaInit(void);
extern void Init(void);
uint16 tx_data[D_SIZE] = {0x1111,0x2222,0x3333,0x4444,0x5555,0x6666,0x7777,0x8888};
g_dmaCTRL g_dmaCTRLPKT2, g_dmaCTRLPKT3;

int main(void)
{
_enable_interrupt_();
Driver_Init();
crcREG1->CTRL2=0x00000000;
crcREG1->CTRL2 |= (CRC_AUTO) | (CRC_AUTO << 8U);
dmaSetCtrlPacket(DMA_CH2,g_dmaCTRLPKT2);
dmaSetCtrlPacket(DMA_CH3,g_dmaCTRLPKT3);
dmaSetChEnable(DMA_CH2, DMA_HW);
dmaSetChEnable(DMA_CH3, DMA_HW);
dmaEnable();
while(1);
}

void DmaInit(void)
{
g_dmaCTRLPKT2.SADD = (uint32_t)(&CRC1_Ref[0]); /* source address */
g_dmaCTRLPKT2.DADD = (uint32_t)(&(crcREG1->REGL1)); /* destination address */
g_dmaCTRLPKT2.CHCTRL = 0; /* channel control */
g_dmaCTRLPKT2.FRCNT = 1; /* frame count */
g_dmaCTRLPKT2.ELCNT = D_SIZE; /* element count */
g_dmaCTRLPKT2.ELDOFFSET = 4; /* element destination offset */
g_dmaCTRLPKT2.ELSOFFSET = 0; /* element destination offset */
g_dmaCTRLPKT2.FRDOFFSET = 0; /* frame destination offset */
g_dmaCTRLPKT2.FRSOFFSET = 0; /* frame destination offset */
g_dmaCTRLPKT2.PORTASGN = PORTA_READ_PORTB_WRITE; /* port b */
g_dmaCTRLPKT2.RDSIZE = ACCESS_64_BIT; /* read size */
g_dmaCTRLPKT2.WRSIZE = ACCESS_64_BIT; /* write size */
g_dmaCTRLPKT2.TTYPE = FRAME_TRANSFER ; /* transfer type */
g_dmaCTRLPKT2.ADDMODERD = ADDR_INC1; /* address mode read */
g_dmaCTRLPKT2.ADDMODEWR = ADDR_FIXED; /* address mode write */
g_dmaCTRLPKT2.AUTOINIT = AUTOINIT_ON; /* autoinit */

g_dmaCTRLPKT3.SADD = (uint32_t)tx_data; /* source address */
g_dmaCTRLPKT3.DADD = (uint32_t)(&(crcREG1->PSA_SIGREGL1)); /* destination address */
g_dmaCTRLPKT3.CHCTRL = 0; /* channel control */
g_dmaCTRLPKT3.FRCNT = 1; /* frame count */
g_dmaCTRLPKT3.ELCNT = D_SIZE; //Pcount /* element count */
g_dmaCTRLPKT3.ELDOFFSET = 0; /* element destination offset */
g_dmaCTRLPKT3.ELSOFFSET = 4; /* element destination offset */
g_dmaCTRLPKT3.FRDOFFSET = 0; /* frame destination offset */
g_dmaCTRLPKT3.FRSOFFSET = 0; /* frame destination offset */
g_dmaCTRLPKT3.PORTASGN = PORTB_READ_PORTA_WRITE; /* port b */
g_dmaCTRLPKT3.RDSIZE = ACCESS_64_BIT; /* read size */
g_dmaCTRLPKT3.WRSIZE = ACCESS_64_BIT; /* write size */
g_dmaCTRLPKT3.TTYPE = FRAME_TRANSFER ; /* transfer type */
g_dmaCTRLPKT3.ADDMODERD = ADDR_OFFSET; /* address mode read */
g_dmaCTRLPKT3.ADDMODEWR = ADDR_FIXED; /* address mode write */
g_dmaCTRLPKT3.AUTOINIT = AUTOINIT_ON; /* autoinit */
}
void Driver_Init(void)
{
DmaInit();
crcInit();
}

void crcNotification(crcBASE_t *crc, uint32_t flags)
{
//crc is failing; Check the ref crc saved
}

Can you please check whats the issue in this.

Thank you.