Tool/software: Code Composer Studio
I'm facing some difficulties regarding setting the ADC to 2MSPS. From what I've read on the datasheet, in order to achieve maximum performance, a clock of 32MHz must be supplied to the ADC.
So I configured the ADC this way
void config_ADC0(void) { ROM_GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_0); ROM_ADCReferenceSet(ADC0_BASE, ADC_REF_INT); ROM_ADCSequenceConfigure(ADC0_BASE, 3, ADC_TRIGGER_TIMER, 0); ROM_ADCSequenceStepConfigure(ADC0_BASE, 3, 0, ADC_CTL_CH16 | ADC_CTL_IE | ADC_CTL_END); ROM_ADCHardwareOversampleConfigure(ADC0_BASE, 0); //480MHz PLL / 15 = 32MHz = 2MSPS ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 15); ROM_ADCSequenceEnable(ADC0_BASE, 3); ROM_IntDisable(INT_ADC0SS3); ROM_ADCIntDisable(ADC0_BASE, 3); ROM_IntPendClear(INT_ADC0SS3); ROM_ADCIntClear(ADC0_BASE, 3); ROM_IntEnable(INT_ADC0SS3); ROM_ADCIntEnable(ADC0_BASE, 3); }
And configured the Timer0 to be the trigger (counting at 2MHz speed). But the ADC speed is capped at 1MHz, even when I use ADC_TRIGGER_ALWAYS instead. The system clock is 120MHz with 480MHz PLL.
I'm using these functions and a logic analyser to see the actual speed:
void ADC0SS3IntHandler(void) { ROM_ADCIntClear(ADC0_BASE, 3); //ROM_ADCSequenceDataGet(ADC0_BASE, 3, g_adc0Reading); ROM_GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_4, g_flagAdc0 ? GPIO_PIN_4 : 0x00); g_flagAdc0 = !g_flagAdc0; }
The ADC frequency is 2x the output pin frequency. The only way I could achieve a little higher than 1MSPS (~1.2MSPS unstable) was when I divided the PLL frequency by 7 (resulting a 68MHz for the ADC), but that doesn't make sense. What can I do to achieve 2MSPS?