HERCULES_SAFETY_MCU_DEMOS: Is delay needed between setting and reading values from the N2HET's digital loopback test registers?

Hello Peter,

I just did a test, and don't see the problem as you mentioned. This is my code:

//digital loopback nhet 0 and nhet 1; nhet 0 is output and nhet 1 is input
hetInit();
hetPORT1->DCLR = 0xFFFFFFFF;
hetREG1->LBPDIR = 0x000A0001;
hetREG1->LBPSEL = 0x00000001;
hetPORT1->DSET |= (0x1);
i = (hetPORT1->DIN & 0x02);

while(1);

Hi QJ,

I am not surprised that you were not able to reproduce the problem.

My original code didn't have the delay and it worked on one our our platforms.

When I ran the same code on a faster platform, I started to see the data not stable problem.  

My test is slightly different than yours.  I am testing all 16 loopback pairs at the same time.  Mine is similar to the following pseudo code:

LBPSEL = 0x0000FFFF;

LBRDIR = 0x000AFFFF;  // in a different test, I set tihs value to 0x000A0000 to test the other direction

loop {

   DOUT = pattern

   read DIN

}

I use DOUT instead of DSET / DCLR.  I don't believe this is an issue.

On the faster platform, the failure is immediate and consistent.  Let me know if you can reproduce this behavior.

BR,

Peter C

 

Hello Peter,

This is no problem. I tried two patterns: 0x55555555 to output 0x1 and 0xAAAAAAAA to output 0

When output 0, DIN should be 0x00000000

When output 1, DIN should be 0xFFFFFFFF

for(i=0; i<20; i++){
data = 0x0;
pattern ^= 0xFFFFFFFF;
hetPORT1->DOUT = pattern;
data = hetPORT1->DIN;
if ((pattern == 0x55555555) && (data !=0xFFFFFFFF))  
  while(1);
if ((pattern == 0xAAAAAAAA) && (data !=0x00000000))
  while(1);
}
while(1);

Hi QJ,

Thanks for the testing and verification.  Let me summarize on our current understanding:

1. You were not able to reproduce the mentioned issue in your environment.  You tried using DIN and DOUT like what I was doing and you were not able to reproduce the issue.  Basically, the solution works for you and you do not need to add any delay between writing the pattern and reading the resulting data from the loopback hardware.

2. I used the same logic but saw a need to insert a delay element before I can read back the correct expected data from the loopback hardware.  The same code works in a slower system but did not on a faster system.  (I measured the execution time using a debugger on the same unit-under-test and same debugger.  My faster and slower software images have differ configuration and I don't have a list of configuration differences between the two).  Empirical data tells me I needed to add in the delay on my faster system to get valid loopback test results.

Could we try a different tactic?  Is it correct to say the NHET loopback hardware implementation is not an instantaneous conversion.  That is, it takes some finite time for the output data to reflect the input data.  Do you know what this finite time should be?

Best,

Peter C