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TM4C129ENCPDT: Writing to external NOR Flash via EPI interface when Firmware is residing in the same flash

Prajnith Kumar
Intellectual 295 points
Part Number: TM4C129ENCPDT

Hello All,

To give you a brief overview about my problem

Currently my firmware resides on external NOR flash (via E.P.I) and it works fine. But i want to update some meta data on the 1st sector of external NOR flash and here i face the issue. I'm able to read data from 1st sector of external flash but wiring to that sector crashes the firmware.

My question is, is there any restriction on writing to external flash when the main firmware resides on that flash

Note : Main firmware is placed after sector 2 and sector 1 is solely for saving meta data

System Clock: 120Mhz

NOR Flash (64MB) and SRAM (2MB) interfaced via EPI with 16 bit mode and shared parallel lines

Thanks in Advance

Prajnith

  • 0
    TI__Guru*** 135225 points
    Hello Prajnith,

    If I am understanding correct, you are executing code from the NOR Flash and then when you try and overwrite the code, it can crash the firmware?

    Is the firmware update processing running from the TM4C or the NOR Flash?

    Is there execution of firmware going on in the NOR Flash while you are doing this?

    To me it sounds like you are overwritten the program as it is executing something and that is a big problem. The firmware shouldn't be executing when it is being updated or else the PC or Stack Pointer could end up in an invalid location which would crash your program.
  • 0
    TI__Guru*** 135225 points
    Hello Prajnith,

    Were you able to resolve this issue? If not, I am still awaiting feedback on my prior questions, thanks!
  • 0 in reply to Ralph Jacobi
    Intellectual 295 points
    Hello Ralph,

    The code is located in NOR flash but it resides from sector 2 and I'm trying to write to sector 1 of the NOR flash so i'm not overwriting my code

    Regards,
    Prajnith
  • 0 in reply to Prajnith Kumar
    TI__Guru*** 135225 points
    Hello Prajnith,

    Understood.

    The NOR Flash would need the TM4C to be available to run any code right?

    Since the TM4C is a single core processor the another idea I can think of is that since the EPI is busy on writing, then the firmware in Sector 2 cannot execute properly as the EPI bus would be unavailable.

    Related to that, if the firmware in Sector 2 is halted until the write operations to Sector 1 are completed, then the issue may just be resuming operation by loading the correct PC and stack values to resume operation exactly as it was left beforehand.

    Honestly this is not an issue we've seen before so it's difficult to comment on possible root causes just based on the description. If I knew more about the details of what the firmware executing in the NOR Flash is, how the TM4C executes code from it (i.e. the TM4C has to initiate all reads for execution right? So how is that setup?), and where the process to write to Sector 1 is located (i.e. is it on NOR Flash, or on the TM4C) maybe I can come up with other ideas to offer.