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TM4C123GE6PM: Why is SPI data rate at 20Mhz when set to 16Mhz

Robbie Valentine
Expert 2975 points
Part Number: TM4C123GE6PM

Hello,

Why is my SPI data rate coming out at 20Mhz when I'm setting it to 16Mhz?  

	SSIConfigSetExpClk(SSI0_BASE, 80000000, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 16000000, 8);

I noticed this from the data sheet:

The equation uses CPSDVSR so you basically multiply the denominator by an even number every time.  So does that mean you can't divide SysClk by an odd number?  Seems like a dumb questions, but it is odd to me that your data rate as master would be so constrained.  I thought I was using a 16Mhz data rate, but I'm not it is actually 20Mhz.  I've verified this with the scope below:

  • 0
    TI__Guru*** 135355 points
    Hello Robbie,

    I couldn't see your attached datasheet imagine, but I will copy portions of text from the datasheet:

    I assume the equation you are mentioning is:

    The frequency of the output clock SSInClk is defined by: SSInClk = SysClk / (CPSDVSR * (1 + SCR))

    The reason for this is explained here:

    "The serial bit rate is derived by dividing down the input clock (SysClk). The clock is first divided by an even prescale value CPSDVSR from 2 to 254"

    "The clock is further divided by a value from 1 to 256, which is 1 + SCR"

    Therefore, you cannot get a 16MHz SSI Clock signal using the SSI module on the TM4C123x family of devices as the first division brings it down to 40MHz which you cannot divide into 16MHz. 20MHz or 13.33MHz are the closest options.
  • 0 in reply to Ralph Jacobi
    Expert 2975 points
    Ok, that seems weird the resolution of the data rate is so poor, but I just wanted to double check. I'm running at 20 now and it works reliably so not a huge deal.