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CCS/TMS570LS3137: TMS570LS3137

Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

I tried EMAC sample code lwip_v002 for tms570ls3137 hdk ,  the issue found when debugging is,it appears to enter into the function MDIOPhyRegRead() and sucked on infinite loop.Please help me to resolve this.

  • Hello Aravind,

    To use ethernet on HDK, the Ethernet_ON should be pushed to right position (channel 4 of dip switch S2).

    The MDIO_CLK and MDIO_D are muxed with other signals. Setting S2 is to route MDIO signals to ethernet PHY.
  • Thanks for your response,

    I have ON the Ethernet dip switch, but still rounds within the loop 

    what may be the root cause the for the problem, where could I start to troubleshoot it from driver config or something else.

  • Hello Aravind,

    The only thing affecting PHY register reading is the pinmux of MDCLK and MDIO. MDCLK is muxed with MiSPI3nCS[1] and NeHET1[25]. The MDIO ix muxed with MibSPI1nCS[2] and NeHET1[19].

    1. MDCLK: pinmux7[10:8] should be b100. Address is 0xFFFFEB2C.
    2. MDIO: pinmux9[10] should be b100. Address is 0xFFFFEB30.
  • Thanks for your support QJ Wang, I check with the thing and confirm you.

    Thanks and regards,

    Aravind.M

  • Hello Aravind,

    I wrote a simple code to write data to PHY registers and read the value from several register. This can be used to check if the MDIO work. Just copy to your HALCOGen generated project.

    /* USER CODE BEGIN (0) */
    /* USER CODE END */

    /* Include Files */


    /* USER CODE BEGIN (1) */
    /* USER CODE END */


    * @brief Application main function
    * @note This function is empty by default.
    *
    * This function is called after startup.
    * The user can use this function to implement the application.
    */

    /* USER CODE BEGIN (2) */

    uint16_t phy_getReg( uint16_t phynum, uint16_t regnum )
    {
    uint16_t value;

    MDIO_USERACCESS0 = 0 // Read Phy Id 1
    | ( 1 << 31 ) // [31] Go
    | ( 0 << 30 ) // [30] Read
    | ( 0 << 29 ) // [29] Ack
    | ( (regnum & 0x1F) << 21 ) // [25-21] PHY register address
    | ( (phynum & 0x1F) << 16 ) // [20-16] PHY address
    | ( 0 << 0 ); // [15-0] Data

    while( MDIO_USERACCESS0 & 0x80000000 ); // Wait for Results

    value = MDIO_USERACCESS0;
    return value;
    }

    void phy_setReg( uint16_t phynum, uint16_t regnum, uint16_t data )
    {
    MDIO_USERACCESS0 = 0 // Read Phy Id 1
    | ( 1 << 31 ) // [31] Go
    | ( 1 << 30 ) // [30] Write
    | ( 0 << 29 ) // [29] Ack
    | ( (regnum & 0x1F) << 21 ) // [25-21] PHY register address
    | ( (phynum & 0x1F) << 16 ) // [20-16] PHY address
    | ( (data & 0xFFFF) << 0 ); // [15-0] Data

    while( MDIO_USERACCESS0 & 0x80000000 ); // Wait for Results
    }

    void delay(void) {
    static volatile unsigned int delayval;
    delayval = 10000; // 100000 are about 10ms
    while(delayval--);
    }

    /* USER CODE END */
    int main(void)
    {
    /* USER CODE BEGIN (3) */
    uint16_t i;
    uint16_t phy_ctrl_reg;

    /* ---------------------------------------------------------------- *
    * Init PHY / MDIO *
    * ---------------------------------------------------------------- */
    MDIO_CONTROL = 0x41000020; // Enable MII interface 0x40000001

    delay();

    MDIO_USERACCESS0 = 0 // Read Phy Id 1
    | ( 1 << 31 ) // [31] Go
    | ( 0 << 30 ) // [30] Read
    | ( 0 << 29 ) // [29] Ack
    | ( 2 << 21 ) // [25-21] PHY register address
    | ( 1 << 16 ) // [20-16] PHY address
    | ( 0 << 0 ); // [15-0] Data

    while( MDIO_USERACCESS0 & 0x80000000 ); // Wait for Results

    phy_ctrl_reg = 0
    | ( 0 << 15 ) // Reset
    | ( 0 << 14 ) // Loopback
    | ( 1 << 13 ) // Speed Selection
    | ( 1 << 12 ) // Auto-Negotiation Enable
    | ( 0 << 11 ) // Power-Down
    | ( 0 << 10 ) // Isolate
    | ( 0 << 9 ) // Restart Auto-Negotiation
    | ( 1 << 8 ) // Duplex Mode
    | ( 0 << 7 ) // Collision Test
    | ( 0 << 6 ); // Speed Selection

    MDIO_USERACCESS0 = 0 // Set Control Reg
    | ( 1 << 31 ) // [31] Go
    | ( 1 << 30 ) // [30] Write
    | ( 0 << 29 ) // [29] Ack
    | ( 0 << 21 ) // [25-21] PHY register address
    | ( 1 << 16 ) // [20-16] PHY address
    | ( phy_ctrl_reg << 0 ); // [15-0] Data

    while( MDIO_USERACCESS0 & 0x80000000 ); // Wait for Results

    //readback PHY register
    PCSR = phy_getReg(1, 0x16);
    PCSR = phy_getReg(1, 0x19);
    PCSR = phy_getReg(1, 0x18);
    PCSR = phy_getReg(1, 0x1B);

    }

    /* Wait for link */
    // Waiting for link...
    while( (phy_getReg( 1, 1 ) & 0x4 ) == 0) ;

    /* USER CODE END */

    return 0;
    }


    /* USER CODE BEGIN (4) */
    /* USER CODE END */