Part Number: TMS570LC4357
Hi,
We are trying to check the chained DMA feature of TMS570LC4357.
Currently we are using for TMS570LC43x Hercules Development Kit (HDK).
Two dma channels, channel 0 and channel 1 are configured to write in to the SCI Tx data register( SCI->TD).
The dmachannel0 is triggered by dmaSetChEnable(). It is chained to dmachannel1 .
I am expecting the sci-td register with the value written using dmachannel1.
Is this understanding correct ?
While running this, the dma pend regsiter is having value 1 , meaning dmachannel1 is not executed.
The value in sci->TD register is coming as 0 and not updated.
I am writing in to SCI->TD register just for checking dma working and not checking any SCI functions.
The source code is as below. Could you please help.
int main(void)
{
uint32 pendstatus,sciregvalue;
_enable_interrupt_();
gioEnableNotification(gioPORTA, 7U);
/** Initialize all the Drivers */
Driver_Init();
dmaEnable();
dmaSetCtrlPacket(DMA_CH0,g_dmaCTRLPKT0);
dmaSetCtrlPacket(DMA_CH1,g_dmaCTRLPKT1);
dmaSetChEnable(DMA_CH0, DMA_SW);
pendstatus = dmaREG->PEND; //for checking pending channel
sciregvalue = sciREG1->TD;
while(1);
}
Thanks
/* USER CODE BEGIN (4) */
void DmaInit(void)
{
uint8 testdata1 , testdata2;
testdata1 = 0x11;
testdata2 = 0x22;
g_dmaCTRLPKT0.SADD = (uint32)&testdata1; /* source address */
g_dmaCTRLPKT0.DADD = (uint32_t)(&(sciREG1->TD)); /* destination address */
g_dmaCTRLPKT0.CHCTRL = (uint32)(1U +1U)<<16U; /* channel control */
g_dmaCTRLPKT0.FRCNT = 1; /* frame count */
g_dmaCTRLPKT0.ELCNT = 1; /* element count */
g_dmaCTRLPKT0.ELDOFFSET = 0; /* element destination offset */
g_dmaCTRLPKT0.ELSOFFSET = 0; /* element destination offset */
g_dmaCTRLPKT0.FRDOFFSET = 0; /* frame destination offset */
g_dmaCTRLPKT0.FRSOFFSET = 0; /* frame destination offset */
g_dmaCTRLPKT0.PORTASGN = PORTA_READ_PORTB_WRITE;
g_dmaCTRLPKT0.RDSIZE = ACCESS_8_BIT; /* read size */
g_dmaCTRLPKT0.WRSIZE = ACCESS_8_BIT; /* write size */
g_dmaCTRLPKT0.TTYPE = FRAME_TRANSFER ; /* transfer type */
g_dmaCTRLPKT0.ADDMODERD = ADDR_FIXED; /* address mode read */
g_dmaCTRLPKT0.ADDMODEWR = ADDR_FIXED; /* address mode write */
g_dmaCTRLPKT0.AUTOINIT = AUTOINIT_OFF; /* autoinit */
g_dmaCTRLPKT1.SADD = (uint32)&testdata2; /* source address */
g_dmaCTRLPKT1.DADD = (uint32_t)(&(sciREG1->TD)); /* destination address */
g_dmaCTRLPKT1.CHCTRL = 0; /* channel control */
g_dmaCTRLPKT1.FRCNT = 1; /* frame count */
g_dmaCTRLPKT1.ELCNT = 1; /* element count */
g_dmaCTRLPKT1.ELDOFFSET = 4; /* element destination offset */
g_dmaCTRLPKT1.ELSOFFSET = 0; /* element destination offset */
g_dmaCTRLPKT1.FRDOFFSET = 0; /* frame destination offset */
g_dmaCTRLPKT1.FRSOFFSET = 0; /* frame destination offset */
g_dmaCTRLPKT1.PORTASGN = PORTA_READ_PORTB_WRITE;
g_dmaCTRLPKT1.RDSIZE = ACCESS_8_BIT; /* read size */
g_dmaCTRLPKT1.WRSIZE = ACCESS_8_BIT; /* write size */
g_dmaCTRLPKT1.TTYPE = FRAME_TRANSFER ; /* transfer type */
g_dmaCTRLPKT1.ADDMODERD = ADDR_FIXED; /* address mode read */
g_dmaCTRLPKT1.ADDMODEWR = ADDR_FIXED; /* address mode write */
g_dmaCTRLPKT1.AUTOINIT = AUTOINIT_OFF; /* autoinit */
}
void Driver_Init(void)
{
/** Initialize PORT */
gioInit(gioPORTA);
/** Initialize I2C */
i2cInit(i2cREG1,I2CDriver1);
/** Initialization of internally connect LED Board in EVM */
Init();
/** Initialize DMA */
DmaInit();
/** Initialize UART */
sciInit(sciREG1 ,&sciDriver1);
}
