RTOS/RM48L952: Non FreeRTOS Bootloader with FreeRTOS Application

Claudio Lei

Part Number: RM48L952

Tool/software: TI-RTOS

I am using the standart SafetyMCU_enet_bootloader from TI. When i flash a non Freertos Application, it works everything. With a FreeRTOS application it doesn't work.

I found forums with similary problems :

https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/377090?tms570ls20212-custom-bootloader-and-freertos

e2e.ti.com/.../476577

According to the forums, i have to adjust the intvect.asm file. i did not make it right and i don't know how to.

Here is my bootloader linker settings:

/* Linker Settings                                                            */

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    VECTORS 	(X)  	: origin=0x00000000 length=0x00000020
    FLASH_API  	(RX)  	: origin=0x00000020 length=0x000014E0
    FLASHBOOT  	(RX) 	: origin=0x00001500 length=0x0007EB00
    STACKS  	(RW) 	: origin=0x08000000 length=0x00002000
    RAM     	(RW) 	: origin=0x08002000 length=0x0003E000

/* USER CODE BEGIN (2) */
/* USER CODE END */
}

/* USER CODE BEGIN (3) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > VECTORS
   flashAPI :
   {
     ..\Debug\app\source\Fapi_UserDefinedFunctions.obj (.text)
     ..\Debug\app\source\bl_flash.obj (.text)
     --library= ..\LIB\F021_API_CortexR4_LE.lib (.text)
   } load = FLASH_API, run = RAM, LOAD_START(api_load), RUN_START(api_run), SIZE(api_size)
    .text    : {} > FLASHBOOT
    .const   : {} > FLASHBOOT
    .cinit   : {} > FLASHBOOT
    .pinit   : {} > FLASHBOOT
    .bss     : {} > RAM
    .data    : {} > RAM
	.sysmem  : {} > RAM

Here is my application FreeRTOS linker settings:

/* Linker Settings                                                            */

--retain="*(.app_intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    VECTORS (X)  : origin=0x00020000 length=0x00000020
    KERNEL  (RX) : origin=0x00020020 length=0x00008000
    FLASH0  (RX) : origin=0x00028020 length=0x00157FE0
    FLASH1  (RX) : origin=0x00180000 length=0x00180000
    STACKS  (RW) : origin=0x08000000 length=0x00000800
    KRAM    (RW) : origin=0x08000800 length=0x00000800
    RAM     (RW) : origin=(0x08000800+0x00000800) length=(0x0003f800 - 0x00000800)
    
/* USER CODE BEGIN (2) */
	SDRAM  (RW) : origin=0x80000000 length=0x01000000
/* USER CODE END */
}

/* USER CODE BEGIN (3) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .app_intvecs : {} > VECTORS
    /* FreeRTOS Kernel in protected region of Flash */
    .kernelTEXT   : {} > KERNEL
    .cinit        : {} > KERNEL
    .pinit        : {} > KERNEL
    /* Rest of code to user mode flash region */
    .text         : {} > FLASH0 | FLASH1
    .const        : {} > FLASH0 | FLASH1
    /* FreeRTOS Kernel data in protected region of RAM */
    .kernelBSS    : {} > KRAM
    .kernelHEAP   : {} > RAM
    .bss          : {} > RAM
    .data         : {} > RAM    

/* USER CODE BEGIN (4) */
	.TI.noinit    : {} > SDRAM
	.TI.persistent: {} > SDRAM
	.sdram        : {} > SDRAM
/* USER CODE END */
}

over 7 years ago

0 QJ Wang over 7 years ago

TI__Guru**** 197426 points

Hi Claudio

Can you please post your sys_intvec.asm of your board? It should like this:

b _c_int00 ;0x00
b #0x1FFF8 ; 0x1FFF8=0x20000-0x8;
b #0x1FFF8 ; Software interrupt
b #0x1FFF8 ; Abort (prefetch)
b #0x1FFF8 ; Abort (data)
reservedEntry
b reservedEntry ;0x14
ldr pc,[pc, #-0x1b0] ;0x18
ldr pc,[pc, #-0x1b0] ;0x1C

0 Claudio Lei over 7 years ago in reply to QJ Wang

Prodigy 90 points

Hello Mr. Wang

Thank you for your fast answer.

My Bootloader sys_intvec.asm looks now like this:

.sect ".intvecs"
    .arm

;-------------------------------------------------------------------------------
; import reference for interrupt routines

    .ref _c_int00

;-------------------------------------------------------------------------------
; interrupt vectors

	b   _c_int00 ;0x00
	b   #0x1FFF8 ; 0x1FFF8=0x20000-0x8;
	b   #0x1FFF8 ; Software interrupt
	b   #0x1FFF8 ; Abort (prefetch)
	b   #0x1FFF8 ; Abort (data)
reservedEntry
	b reservedEntry ;0x14
	ldr pc,[pc, #-0x1b0] ;0x18
	ldr pc,[pc, #-0x1b0] ;0x1C

;-------------------------------------------------------------------------------


My FreeRTOS application sys_intvec.asm looks now like this:

    .sect ".app_intvecs"
    .arm

;-------------------------------------------------------------------------------
; import reference for interrupt routines

    .ref _c_int00
    .ref vPortSWI
    .ref _dabort
    .ref phantomInterrupt
    .def resetEntry

;-------------------------------------------------------------------------------
; interrupt vectors

resetEntry
        b   _c_int00
undefEntry
        b   undefEntry
        b   vPortSWI
prefetchEntry
        b   prefetchEntry
        b   _dabort
        b   phantomInterrupt
        ldr pc,[pc,#-0x1b0]
        ldr pc,[pc,#-0x1b0]

    
;-------------------------------------------------------------------------------

With this config, my bootloader program hangs at address 0x20004. Why he jumps now to app address? ThereWhat am I doing wrong?

0 Claudio Lei over 7 years ago in reply to Claudio Lei

Prodigy 90 points

0 Claudio Lei over 7 years ago in reply to Claudio Lei

Prodigy 90 points

Hello Mr. Wang

Today i tried one more time. Now I have made it work, but only without the "checkRAMECC();" function in sys_startup.c. Inside this function it always makes a abort, when i have your suggested interrupt vector tabel. I think it is not recomended to run an application without this function, right?

0 QJ Wang over 7 years ago in reply to Claudio Lei

TI__Guru**** 197426 points

Hello Lei,

You don't have to do fault injection to test the CPU ECC mechanism for RAM accesses in your bootloader. The checkRAMECC() causes deliberate single-bit and double-bit errors in TCRAM accesses by corrupting 1 or 2 bits in the ECC. Reading from the TCRAM location with a 2-bit error in the ECC causes a data abort exception. The data abort is an expected behavior.

If you want to yun checkRAMECC(), please copy the data abort handler to your project. This data abort handler is written to look for deliberately caused exception and to return the code execution to the instruction following the one that caused the abort.

3250.dabort.asm

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RTOS/RM48L952: Non FreeRTOS Bootloader with FreeRTOS Application