MibSPI RAM Initialization

Eugene K

14.10.1 Multi-Buffer RAM Auto Initialization
When the MIBSPI is out of reset mode, auto initialization of multi-buffer RAM starts...

Will it initialize parity bits as well?

Eugene

over 15 years ago

0 Haixiao Weng over 15 years ago

TI__Genius 13810 points

The parity bits are also initialized as well according to DEVCR1 register (0xffffffdc). I don't know why the DEVCR1 can not be found in the TRM. Anyway, I plan to add that into next TRM release.

By default, DEVCR1(3:0)=0xA, odd parity

if you set DEVCR1(3:0)=0x5, even parity

Regards,

Haixiao

0 Eugene K over 15 years ago in reply to Haixiao Weng

Expert 1685 points

Haixiao,

Does PBIST have access to MibSPI RAM while peripheral is in reset?

Eugene

0 Haixiao Weng over 15 years ago in reply to Eugene K

TI__Genius 13810 points

Eugene,

Yes, the PBIST can access MIbspi RAM while it is in reset.

You don't have to enable MIbspi before you run PBIST.

Regards,

Haixiao

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MibSPI RAM Initialization