DK-TM4C129X: uDMA with ADCs

Part Number: DK-TM4C129X

Hey, I was going through this post as I am also having similar problem. I am sampling a signal from function generator by ADC using ping pong mode of uDMA. I have sampled the signal successfully, but after sampling I am calculating FFT of that. While doing that, my program is not reaching the FFT part of code and rather remains in ADCseq0Handler(). I checked the register that you suggested earlier in post, ADCISC, its value is non zero. But sampling is done correctly. So, what is the problem when I run the code, why it keeps on interrupting ADCseq0handler? 

ADCseq0Handler:

 uint32_t ui32Mode;

    ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS0);
   // uint32_t ui32Status = ADCIntStatus(ADC0_BASE, 0, false);
    //HWREG(ADC0_BASE+ADC_O_ISC) = ui32Status;

    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT);

    if(ui32Mode == UDMA_MODE_STOP)
    {

        uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,

                                   UDMA_MODE_PINGPONG,

                                   (void *)(ADC0_BASE + ADC_O_SSFIFO0),

                                   g_ui8RxBufA, MEM_BUFFER_SIZE);

        uDMAChannelEnable(UDMA_CHANNEL_ADC0);

    }

    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT);

    if(ui32Mode == UDMA_MODE_STOP)

    {
        uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT,

                                    UDMA_MODE_PINGPONG,

                                    (void *)(ADC0_BASE + ADC_O_SSFIFO0),

                                    g_ui8RxBufB, MEM_BUFFER_SIZE);

        uDMAChannelEnable(UDMA_CHANNEL_ADC0);

    }

Main:

        uint32_t sysclock;

        sysclock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |

                                              SYSCTL_OSC_MAIN |

                                              SYSCTL_USE_PLL |

                                              SYSCTL_CFG_VCO_480), 120000000);


     SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);

     while(!(SysCtlPeripheralReady(SYSCTL_PERIPH_UDMA)));

     SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UDMA);

     IntMasterEnable();

      IntEnable(INT_UDMAERR);

      uDMAEnable();

      uDMAControlBaseSet(pui8ControlTable);

      InitUART1Transfer(sysclock);


    while(1)
    {

    }

InitUART1Transfer:

 SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);

    while(!(SysCtlPeripheralReady(SYSCTL_PERIPH_ADC0)));

    SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_ADC0);

    //ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 1);
   // ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 30);
    ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 24);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);

    while(!(SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOE)));

    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
    ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_TIMER, 0);

    ADCSequenceStepConfigure(ADC0_BASE, 0, 0, ADC_CTL_CH0 | ADC_CTL_IE |
                             ADC_CTL_END);

    ADCSequenceEnable(ADC0_BASE, 0);

    ADCIntClear(ADC0_BASE, 0);

    // Enable the Timer peripheral
    SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);

    // Timer should run periodically
    TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC);

    // Set the value that is loaded into the timer everytime it finishes
    //   it's the number of clock cycles it takes till the timer triggers the ADC
    //#define F_SAMPLE    1000
    ui32Period = 120000000/1024000;
    TimerLoadSet(TIMER0_BASE, TIMER_A, ui32Period-1);

    // Enable triggering
    TimerControlTrigger(TIMER0_BASE, TIMER_A, true);

    ADCIntEnable(ADC0_BASE, 0);

    // Enable the timer
    TimerEnable(TIMER0_BASE, TIMER_A);

    ADCSequenceDMAEnable(ADC0_BASE, 0);

    uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC0,

                                    UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |

                                    UDMA_ATTR_HIGH_PRIORITY |

                                    UDMA_ATTR_REQMASK);

    uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,

                            UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_NEXT_USEBURST |

                              UDMA_ARB_1024);

    uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT,

                            UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_NEXT_USEBURST |

                            UDMA_ARB_1024);

    uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,

                               UDMA_MODE_PINGPONG,

                               (void *)(ADC0_BASE + ADC_O_SSFIFO0),

                               g_ui8RxBufA, MEM_BUFFER_SIZE);


    uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT,

                                UDMA_MODE_PINGPONG,

                                (void *)(ADC0_BASE + ADC_O_SSFIFO0),

                                g_ui8RxBufB, MEM_BUFFER_SIZE);


    uDMAChannelEnable(UDMA_CHANNEL_ADC0);
    ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS0);

    for(i = 0; i < 1024; i++)
    {
    	/* Perform shifting from LSB to MSB */
    	BufferQ31[i] = ((q31_t)g_ui8RxBufB[i])<<20;
    }
    arm_q31_to_float(BufferQ31, fftin, 1024);
    arm_rfft_fast_instance_f32 S;

    arm_rfft_fast_init_f32(&S, 1024);
    arm_rfft_fast_f32(&S, fftin,fftout,0);

    arm_cmplx_mag_f32(fftout,fftout, 512);

    arm_max_f32(&fftout[1], 511, &maxValue, &maxindex);
    maxindex++;

    IntEnable(INT_ADC0SS0);