TMS570LC4357: Erreta sheet "DEVICE#49"

Hi Christopher,

I have changed the title of the forum post to indicate the correct errata identification number DEVICE#49.

- in the second bullet of condition (2), what is precisely the meaning and definition of "valid memory range" ?
>> The ARM architecture v7R permits speculative accesses to memory locations defined as "Normal" if the access permissions allow an access to these locations. The R4F is able to address 4GB memory total, and many of these locations are not valid. The MPU needs to be programmed to ensure that all memory ranges not expected to hold valid instructions or data are defined to be "Execute Never" (set XN=1 in MPU) memories. The MPU must also be configured to block accesses (return error response) to invalid memory locations.

- in the third bullet of condition (3), does the Debug Acces Port (DAP) function is considered as Mater in « mutliple bus master » ?
>> Yes, the DAP is one of the masters on the interconnect that is able to initiate an access.

Regards,
Sunil

Hi Christopher,

You can use HALCoGen to generate the MPU configuration code per your choice in the GUI. This is on the R5-MPU-PMU tab.

Above image shows the different choices of configuring each memory region.

Regards,

Sunil