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CCS/TM4C1294NCPDT: use JLINK in SWD mode

claus scheidl
Prodigy 230 points
Part Number: TM4C1294NCPDT
Other Parts Discussed in Thread: SEGGER

Tool/software: Code Composer Studio

Folks,

I've a custom board with an TM4C1294 chip. For program and debug only the SWD pins are available - I cannot use the JTAG mode.
Is there a startup script available for the CCS8 to switch the JLink Debugger into the SWD mode?
Or do I really have to make a new PCB layout?

Any hints or ideas appreciated... Claus

  • 0
    Guru 117855 points

    Our firm uses (only) multiple Segger 'J-Links' - and the IAR (pro) IDE - and the SWD mode is, 'automatically detected' by the 'J-Link & mated Segger software.'

    It is uncertain if the 'singular vendor IDE solution' you're presently employing can match such 'eased & sought' functionality.     (Should your code be <= 32KB - you may download IAR's FREE ARM Kickstarter - which (surely) enables the automatic switch to SWD...)    

    Under SWD  - you may (far more) productively 'harvest' those 2 'freed' (past JTAG) signal lines...    Note too - while anecdotal - our firm (and clients) employing J-Link & SWD - have substantially escaped the (now notorious) 'JTAG - LOCKOUTS' - arriving this forum - on a (near) daily basis...

  • 0
    Guru 92251 points

    claus scheidl said:
    Is there a startup script available for the CCS8 to switch the JLink Debugger into the SWD mode?

    In the CCS Target Configuration there is an option to select SWD or JTAG as the Target Interface:

  • 0 in reply to Chester Gillon
    Prodigy 230 points
    Chester, perfect answer,
    this solved my problem and cured my headaches. Thanks a lot.
  • 0 in reply to claus scheidl
    Guru 117855 points

    While (some) headaches may have been abated - might (others) await discovery?

    Segger's J-Link has been proven to suffer (some) feature loss & performance degradation - when used with 'other' than the far more capable & established - 'pro' IDEs' (IAR & Keil.) 

    Note too that there are 'many' ARM MCU Vendors - those 'pro' IDEs 'accommodate all' - which greatly, 'Speeds, Eases, & Enhances' (any) investigation of (another's) ARM MCU.    (thus enabling your identification of that MCU - best satisfying your requirement for: Feature, Performance, Availability, Variants & Price.)

    ARM Cortex:  M0, M0+, M3, & M7 - along  w/M4s (running 50% faster -btw)  - all lurk!       Again - those 'first four' - and the 50% faster (180MHz) M4s - 'invite your  accustomed  (learning-curve FREE) evaluation & use!      (Such can 'Never be achieved' by those lesser, vendor-limited IDEs - which (somehow) register as, less than 'perfect.')      It is believed that you should, 'Have such awareness' - so that the 'best performing - and MCU accommodating' -  long-term decision/choice'  is enabled...