RM48L930: How to enable MIBSPI Transfer Group Rx interrupt

Hello Keith,

Call mibspiEnableGroupNotification() function to enable MibSPI TG transfer complete and suspend interrupt. HALCoGen doesn't have this option to enable or disable the TG interrupt.

Ok, thank you.  Can you explain how the BUFFER_MODE setting works in HalCoGen under the MIBSPI5 Transfer Group tab?  Is a value of 4 (Always) compatible with enabling TG group notification?

thanks,

Question #2,
The RM48Lx30 reference manual (spnu503b), section 24.9.30, states:

"Note: Read Clear Behavior. Reading the interrupt vector registers TGINTVECT0 or
TGINTVECT1 automatically clears the interrupt flag bit INTFLGRDYx referenced by the
vector number given by INTVECT0/INTVECT1 bits, if the SUSPEND[0:1] bit in the vector
registers is 0."

I cannot find any registers in spnu503b.pdf named TGINTVECT0 and TGINTVECT1. Please clarify which registers should be read in order to automatically clear the INTFLGRDY bits.

thanks,