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CCS/TMS570LS0714: Continuous convension mode of ADC module

yu chen62
Prodigy 140 points
Part Number: TMS570LS0714
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

Dear E2E:

   Recently, I try to use ADC module of TMS570LS0714 to read voltage from my ECU.I have some problems about the continuous conversion mode of AD module.

 

(1) When I just use ADC1 Group Event with continuous conversion mode(ADC1 Group1 and ADC1 Group2 are not used), how long will the AD module get a new convension from GxBUF?

 

(2) When I do not read the new convension result in time, What will be happen ?

 

(3) How to keep balance between reading convension result and writing convension result(make the GxINTCR value return to s_adcFifoSize value)?

 

The following is my configuration of ADC module in Halcogen:

  • 0
    TI__Guru**** 197426 points
    Hello Yu,

    1. Total ADC time is: tTOTAL=CHN*tCHANNEL + (CHN-1)*5*tVCLK, where tCHANNEL = tDISCHARGE + tSAMPLE + tCONVERSION
    CHN is number of channels of selected group
    tCHANNEL: measure time per channel
    tVCLK: VCLK period

    tTOTAL is given in HALCoGen configuration GUI

    2. An overrun condition occurs when the ADC module tries to store more conversion results to a group’s results’ memory which is already full. In this case, the ADC allows two options.

    If the OVR_RAM_IGN bit in the group’s operating mode control register is set, then the ADC module ignores the contents of the group’s results’ memory and wraps around to overwrite the memory with the results of new conversions.

    If the OVR_RAM_IGN bit is not set, then the application program has to read out the group’s results’ memory upon an overrun condition; only then can the ADC continue to write new results to the memory.

    3. The ADC module has the ability to generate an interrupt for a fixed number of conversions for each group. A group memory threshold register determines how many conversion results must be in a group’s memory region before the CPU is interrupted. This feature can be used to significantly reduce the CPU load when using interrupts for reading the conversion results. The group’s threshold register needs to be configured before the group conversions are triggered.

    Whenever the threshold counter transitions from +1 to 0, it sets the group’s threshold interrupt flag, and the CPU is interrupted if the group’s threshold interrupt is enabled. The CPU is expected to clear the interrupt flag after reading the conversion results from the memory.